Z86L02 datasheet(33/37 Pages) ZILOG

33 / 37 page

Z86C02/E02/L02

Zilog

Cost Effective, 512-Byte ROM CMOS Z8® Microcontrollers

DS96DZ80301

P R E L I M I N A R Y

Z8 CONTROL REGISTERS

Figure 25. Timer Mode Register (F1H: Read/Write)

Figure 26. Counter Timer 1 Register (f2H:Read/Write)

Figure 27. Prescaler! Register (F3H: Write Only)

Figure 28. Port 2 Mode Register (F6H: Write Only)

0 Disable T Count

1 Enable T Count

Reserved

(Must be 0)

0 No Function

1 Load T 1

0 Disable T Count

1 Enable T Count

Modes

00 External Clock Input

01 Gate Input

10 Trigger Input

(Non-retriggerable)

11 Trigger Input

(Retriggerable)

R241 TMR

Reserved (Must be 0.)

T Initial Value

(When Written)

(Range 1-256 Decimal

01-00 HEX)

T Current Value

(When READ)

R242 T1

Count Mode

0 = T

Single Pass

1 = T

Modulo N

Clock Source

1 = T Internal

0 = T External Timing Input

) Mode

Prescaler Modulo

(Range: 1-64 Decimal

01-00 HEX)

R243 PRE1

- P2

I/O Definition

0 Defines Bit as OUTPUT

1 Defines Bit as INPUT

R246 P2M

Figure 29. Port 3 Mode Register (F7H: Write Only)

Figure 30. Port 0 and 1 Mode Register

(F8H: Write Only)

Figure 31. Interrupt Priority Register

(F9H: Write Only)

0 Port 2 Open-Drain

1 Port 2 Push-pull

Port 3 Inputs

0 Digital Mode

1 Analog Mode

Reserved (Must be 0)

R247 P3M

P03-P00 Mode

00 = Output

01 = Input

Reserved (Must be 1.)

R248 P01M

Reserved (Must be 0.)

Interrupt Group Priority

000 Reserved

001 C > A > B

010 A > B > C

011 A > C > B

100 B > C > A

101 C > B > A

110 B > A > C

111 Reserved

IRQ3, IRQ5 Priority (Group A)

0 IRQ5 > IRQ3

1 IRQ3 > IRQ5

IRQ0, IRQ2 Priority (Group B)

0 IRQ2 > IRQ0

1 IRQ0 > IRQ2

IRQ1, IRQ4 Priority (Group C)

0 IRQ1 > IRQ4

1 IRQ4 > IRQ1

Reserved (Must be 0.)

R249 IPR

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