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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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Z8FS021 датащи(PDF) 52 Page - Zilog, Inc. |
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Z8FS021 датащи(HTML) 52 Page - Zilog, Inc. |
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52 / 68 page  PS028806-0315 Advanced API Register Set ZMOTION® Intrusion Detection Product Specification 44 Table 28. PIR DC Signal Level (ePIR_Signal_DC) Bit 15 14 13 12 11 10 9876543210 Field PIR Signal DC Control Read Address FCH FDH PIR Signal DC (Bits 15–0) Controlled by the PIR Engine. • These registers contain the last PIR signal DC Level calculated by the Engine. Each time the Engine generates new control limits it will place the DC component level in these registers. • Note: The 16 bit value provided by these two 8 bit registers must be read as an atomic operation by the application. This can be ensured by either using the CPU's ATM instruction or by disabling interrupts while reading the two 8 bit registers. Table 29. PIR Extended Detection Sensitivity Level (ePIR_Extended_Sense) Bit 76543210 Field PIR Extended Detection Sensitivity Control Read/Write Address FEH Extended Detection Sensitivity (Bits 7–0) Controlled by the application. • This register determines how sensitive the Extended Detection part of the Engine is to fast or slow speed targets in the PIR field of view. A lower number makes the extended detector more sensitive, at the cost of potential false motion events. The valid range is 1 (most sensitive) to 255 (least sensitive) with typical values between 6 and 25. Related control features include the PIR Extended Detection Level (PIR_SC0) and the PIR Extended Detection Debounce Timeout. |
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