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STM32L151XE датащи(PDF) 101 Page - STMicroelectronics |
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STM32L151XE датащи(HTML) 101 Page - STMicroelectronics |
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101 / 134 page ![]() DocID025433 Rev 8 101/134 STM32L151xE STM32L152xE Electrical characteristics 113 ODD bit value, digital contribution leads to a min of (I2SDIV/(2*I2SDIV+ODD) and a max of (I2SDIV+ODD)/(2*I2SDIV+ODD). Fs max is supported for each mode/condition. Figure 25. I2S slave timing diagram (Philips protocol)(1) 1. Measurement points are done at CMOS levels: 0.3 × VDD and 0.7 × VDD. 2. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first byte. Figure 26. I2S master timing diagram (Philips protocol)(1) 1. Guaranteed by characterization results. 2. LSB transmit/receive of the previously transmitted byte. No LSB transmit/receive is sent before the first byte. |
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