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STM32L062K8 датащи(PDF) 117 Page - STMicroelectronics |
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STM32L062K8 датащи(HTML) 117 Page - STMicroelectronics |
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117 / 118 page ![]() DocID025937 Rev 8 117/118 STM32L062x8 Revision history 117 11-Mar-2016 6 Updated number of SPIs on cover page and in Table 1: Ultra-low-power STM32L062x8 device features and peripheral counts. Changed minimum comparator supply voltage to 1.65 V on cover page. Added number of fast and standard channels in Section 3.11: Analog- to-digital converter (ADC). Updated Section 3.19.2: Universal synchronous/asynchronous receiver transmitter (USART) and Section 3.19.4: Serial peripheral interface (SPI)/Inter-integrated sound (I2S) to mention the fact that USARTs with synchronous mode feature can be used as SPI master interfaces. Added baudrate allowing to wake up the MCU from Stop mode in Section 3.19.2: Universal synchronous/asynchronous receiver transmitter (USART). Section 6.3.15: 12-bit ADC characteristics: – Table 55: ADC characteristics: Distinction made between VDDA for fast and standard channels; added note 1. Added note 4. related to RADC. Updated tS and tCONV. – Updated equation 1 description. – Updated Table 56: RAIN max for fADC = 16 MHz for fADC = 16 MHz and distinction made between fast and standard channels. Updated RO and added Note 1. in Table 58: DAC characteristics. Added Table 65: USART/LPUART characteristics. 09-Jun-2016 7 Added WLCSP36 package, STM32L062T8 part number and corresponding features. 07-Mar-2017 8 Added thin WLCSP36 package. In Section 4: Pin descriptions, renamed USB_OE into USB_NOE. Added mission profile compliance with JEDEC JESD47 in Section 6.2: Absolute maximum ratings. Added note 2. related to the position of the external capacitor below Figure 22: Recommended NRST pin protection. Updated RL in Table 55: ADC characteristics. Updated tAF maximum value for range 1 in Table 64: I2C analog filter characteristics. Updated tWUUSART description in Table 65: USART/LPUART characteristics. NSS timing waveforms updated in Figure 28: SPI timing diagram - slave mode and CPHA = 0 and Figure 29: SPI timing diagram - slave mode and CPHA = 1(1). Added reference to optional marking or inset/upset marks in all package device marking sections. Previous WLCSP36 package renamed “Standard” WLCSP36; added Note 2. below Figure 32: Standard WLCSP36 - 2.61 x 2.88 mm, 0.4 mm pitch wafer level chip scale package outline and updated Table 72: Standard WLCSP36 - 2.61 x 2.88 mm, 0.4 mm pitch wafer level chip scale mechanical data. Table 80. Document revision history (continued) Date Revision Changes |
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