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STM8L151X6 датащи(PDF) 123 Page - STMicroelectronics |
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STM8L151X6 датащи(HTML) 123 Page - STMicroelectronics |
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123 / 146 page ![]() DocID17943 Rev 10 123/146 STM8L151x6/8 STM8L152x6/8 Electrical parameters 123 Static latch-up • LU: 3 complementary static tests are required on 10 parts to assess the latch-up performance. A supply overvoltage (applied to each power supply pin) and a current injection (applied to each input, output and configurable I/O pin) are performed on each sample. This test conforms to the EIA/JESD 78 IC latch-up standard. For more details, refer to the application note AN1181. 9.4 Thermal characteristics The maximum chip junction temperature (TJmax) must never exceed the values given in Table 18: General operating conditions on page 70. The maximum chip-junction temperature, TJmax, in degree Celsius, may be calculated using the following equation: TJmax = TAmax + (PDmax x ΘJA) Where: • TAmax is the maximum ambient temperature in ° C •ΘJA is the package junction-to-ambient thermal resistance in ° C/W • PDmax is the sum of PINTmax and PI/Omax (PDmax = PINTmax + PI/Omax) • PINTmax is the product of IDD and VDD, expressed in Watts. This is the maximum chip internal power. • PI/Omax represents the maximum power dissipation on output pins Where: PI/Omax = Σ (VOL*IOL) + Σ((VDD-VOH)*I OH), taking into account the actual VOL/IOL and VOH/IOH of the I/Os at low and high level in the application. Table 61. Electrical sensitivities Symbol Parameter Class LU Static latch-up class II Table 62. Thermal characteristics(1) 1. Thermal resistances are based on JEDEC JESD51-2 with 4-layer PCB in a natural convection environment. Symbol Parameter Value Unit ΘJA Thermal resistance junction-ambient LQFP 48 - 7 x 7 mm 65 °C/W Thermal resistance junction-ambient UFQFPN 48 - 7 x 7mm 32 Thermal resistance junction-ambient WLCSP32 63 Thermal resistance junction-ambient LQFP 64 - 10 x 10 mm 48 Thermal resistance junction-ambient LQFP 80 - 14 x 14 mm 38 |
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