ST7MC1K2-Auto datasheet(205/371 Pages) STMICROELECTRONICS

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For complete flexibility, the possibility of sampling at fSCF high frequency during the ON time

of the PWM signal is also available when the SPLG bit is set as if there is a delay value in

the DS[3:0] bits. This means that when the sampling is to be performed, after the delay a

sampling window at fSCF frequency is opened until the next OFF time of the PWM signal.

The sampling out interrupt is generated if the delay added is longer than the duty cycle of

the PWM signal. As the SPLG bit is set and a value has been put in the DS[3:0] bits, no

minimum off time is required for the PWM signal and it is automatically set to 0µs in current

mode. A true 100% duty cycle can be also set in the 12-bit Timer in voltage mode. Figure 87

shows in detail the sampling at fSCF high frequency during ON time.

Figure 85.

Adding the delay to sample during ON time for Z detection

Figure 86.

Sampling out interrupt generation

In conclusion, there are four sampling types that are available for Z event detection in

sensorless mode.

Sampling at the end of the OFF time of the PWM signal at the PWM frequency.

Sampling, at a programmable frequency independent of the PWM state (during ON

time or OFF time of the signal). Sampling is done at fSCF (see Table 166).

Sampling during the ON time of the PWM signal by adding a delay at PWM frequency.

Sampling, at a programmable frequency during the ON time (addition of a

programmable delay) of the PWM signal. Sampling is done at fSCF (see Table 166).

Note:

The sampling type is applied only for Z event detection after the D event has occurred.

Whatever the sampling type for Z event detection, the sampling of the signal for D event

detection is always done at the selected fSCF frequency (see Table 166), independently of

the PWM signal (either during ON or OFF time). Table 92 explains the different sampling

types in sensorless and in sensor mode.

When the MOE bit in the MCRA register is reset (MCOx outputs in reset state), and the SR

bit in the MCRA register is reset (sensorless mode) and the SPLG bit in the MCRC register

PWM OFF time

Current sample

DS[3:0]

New sample

TSampling

PWM signal

DS[3:0]

TSampling

PWM signal

New sample during next OFF time.

Sample not taken into account.

SO interrupt generated.

To interrupt generator

PWM OFF time

Current sample

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