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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST7MC1K2-Auto датащи(PDF) 139 Page - STMicroelectronics |
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ST7MC1K2-Auto датащи(HTML) 139 Page - STMicroelectronics |
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139 / 371 page  Obsolete Product(s) - Obsolete Product(s) ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto On-chip peripherals 139/371 While the SPIF bit is set, all writes to the SPIDR register are inhibited until the SPICSR register is read. Warning: A write to the SPIDR register places data directly into the shift register for transmission. A read to the SPIDR register returns the value located in the buffer and not the content of the shift register (see Figure 54). SPI register map and reset values 10.5 LINSCI serial communication interface (LIN master/slave) 10.5.1 Introduction The serial communications interface (SCI) offers a flexible means of full-duplex data exchange with external equipment requiring an industry standard NRZ asynchronous serial data format. The SCI offers a very wide range of baud rates using two baud rate generator systems. The LIN-dedicated features support the LIN (local interconnect network) protocol for both master and slave nodes. This chapter is divided into SCI mode and LIN mode sections. For information on general SCI communications, refer to Section 10.5.5: SCI mode - functional description. For LIN applications, refer to both Section 10.5.5: SCI mode - functional description and Section 10.5.9: LIN mode - functional description. Table 58. SPI register map and reset values Address (Hex.) Register label 7 6 5 4 3 2 1 0 0021h SPIDR Reset value MSB xx x x x x x LSB x 0022h SPICR Reset value SPIE 0 SPE 0 SPR2 0 MSTR 0 CPOL x CPHA x SPR1 x SPR0 x 0023h SPICSR Reset value SPIF 0 WCOL 0 OVR 0 MODF 00 SOD 0 SSM 0 SSI 0 Obsolete Product(s) - Obsolete Product(s) |
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