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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST7DALIF2 датащи(PDF) 74 Page - STMicroelectronics |
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ST7DALIF2 датащи(HTML) 74 Page - STMicroelectronics |
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74 / 171 page  12-bit autoreload timer 2 (AT2) ST7DALIF2 74/171 the upcounter matches the DCRx value the PWMx signals are set to a low level. To obtain a signal on a PWMx pin, the contents of the corresponding DCRx register must be greater than the contents of the ATR register. The polarity bits can be used to invert any of the four output signals. The inversion is synchronized with the counter overflow if the TRAN bit in the TRANCR register is set (reset value). See Figure 34. Figure 34. PWM inversion diagram The maximum available resolution for the PWMx duty cycle is: Resolution = 1 / (4096 - ATR) Note: To get the maximum resolution (1/4096), the ATR register must be 0. With this maximum resolution, 0% and 100% can be obtained by changing the polarity. Figure 35. PWM function PWMx PWMx PIN counter overflow OPx PWMxCSR Register inverter DFF TRAN TRANCR Register DUTY CYCLE REGISTER AUTO-RELOAD REGISTER t 4095 000 WITH OE=1 AND OPx=0 (ATR) (DCRx) WITH OE=1 AND OPx=1 |
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