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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SRC0 датащи(PDF) 18 Page - STMicroelectronics |
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SRC0 датащи(HTML) 18 Page - STMicroelectronics |
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18 / 48 page  Waveforms SRC0 18/48 DocID026008 Rev 2 Figure 11. Successful power-up on SRC0 1. PB detection on falling edge. 2. Internal pull-down resistor 300 k is connected to PS HOLD input during power-up. 3. PSHOLD signal is ignored during tON_BLANK. When tON_BLANK expires, the level of the PSHOLD signal is high therefore the EN signal remains asserted. PB status and VCCundervoltage ignored PB (1) EN (3) RST Push-button pressed and PB connected to GND t DEBOUNCE tREC processor sets PSHOLD detection tON_BLANK PSHOLD ignored tON_BLANK expires PSHOLD state detected as high EN remains asserted (2) internal pull-down resistor connected to PSHOLD input PSHOLD AM00250v2 INT signal is held high during power-up (i.e. until tON_BLANK expires in the case of the STM6601). V CC is considered VCC > VTH+. Note: |
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