LQFP144 datasheet(88/133 Pages) STMICROELECTRONICS

88 / 133 page

Electrical characteristics

SPC560B54x/6x

88/133

DocID15131 Rev 9

4.11.3.1

Electrostatic discharge (ESD)

Electrostatic discharges (a positive then a negative pulse separated by 1 second) are

applied to the pins of each sample according to each pin combination. The sample size

depends on the number of supply pins in the device (3 parts

(n + 1) supply pin). This test

conforms to the AEC-Q100-002/-003/-011 standard. For more details, refer to the

application note Electrostatic Discharge Sensitivity Measurement (AN1181).

4.11.3.2

Static latch-up (LU)

Two complementary static tests are required on six parts to assess the latch-up

performance:



A supply overvoltage is applied to each power supply pin.



A current injection is applied to each input, output and configurable I/O pin.

These tests are compliant with the EIA/JESD 78 IC latch-up standard.

4.12

Fast external crystal oscillator (4 to 16 MHz) electrical

characteristics

The device provides an oscillator/resonator driver. Figure 11 describes a simple model of

the internal oscillator driver and provides an example of a connection for an oscillator or a

resonator.

Table 37 provides the parameter description of 4 MHz to 16 MHz crystals used for the

design simulations.

Table 35. ESD absolute maximum ratings(1)(2)

Symbol

Ratings

Conditions

Class

Max value(3)

Unit

VESD(HBM)

Electrostatic discharge voltage

(Human Body Model)

TA = 25 °C

conforming to AEC-Q100-002

H1C

2000

VESD(MM)

Electrostatic discharge voltage

(Machine Model)

TA = 25 °C

conforming to AEC-Q100-003

200

VESD(CDM)

Electrostatic discharge voltage

(Charged Device Model)

TA = 25 °C

conforming to AEC-Q100-011

C3A

500

750 (corners)

All ESD testing is in conformity with CDF-AEC-Q100 Stress Test Qualification for Automotive Grade Integrated Circuits.

A device will be defined as a failure if after exposure to ESD pulses the device no longer meets the device specification

requirements. Complete DC parametric and functional testing shall be performed per applicable device specification at

room temperature followed by hot temperature, unless specified otherwise in the device specification.

Data based on characterization results, not tested in production

Table 36. Latch-up results

Symbol

Parameter

Conditions

Class

Static latch-up class

TA = 125 °C

conforming to JESD 78

II level A

LQFP144 датащи(PDF) 88 Page - STMicroelectronics

LQFP144 датащи(HTML) 88 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL