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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LNBH25LS датащи(PDF) 11 Page - STMicroelectronics |
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LNBH25LS датащи(HTML) 11 Page - STMicroelectronics |
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11 / 30 page  LNBH25LS Pin configuration DocID026753 Rev 3 11/30 3 Pin configuration Figure 5: Pin connections (top view) Table 2: Pin description Pin Symbol Name Function 3 LX NMOS drain Integrated N-channel Power MOSFET drain 4 PGND Power ground DC-DC converter power ground. To be connected directly to the exposed pad 6 ADDR Address setting Two I²C bus addresses available by setting the address pin level voltage. See Table 15: "Address pin characteristics" 7 SCL Serial clock Clock from I²C BUS 8 SDA Serial data Bi-directional data from/to I²C bus 9 ISEL Current selection The resistor “RSEL” connected between ISEL and GND defines the linear regulator current limit threshold. See Section 6.5: "Transmission without acknowledge" 2,15,18, 19,23 GND Analog ground Analog circuits ground. To be connected directly to the exposed pad 16 VBYP Bypass capacitor Needed for internal pre-regulator filtering. The VBYP pin is intended only to connect an external ceramic capacitor. Any connection of this pin to external current or voltage sources may cause permanent damage to the device 17 VCC Supply input 8 to 16 V IC DC-DC power supply 20 VOUT LNB output port Output of the integrated very low drop linear regulator. See Table 13: "Output voltage selection table (data1 register, write mode)" for voltage selections and description |
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