L6759D datasheet(26/51 Pages) STMICROELECTRONICS

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Output voltage positioning

L6759D

26/51

Doc ID 023240 Rev 1

When dynamically changing the regulated voltage (DVID), the system needs to charge or

discharge the output capacitor accordingly. This means that an extra-current IDVID needs to

be delivered (especially when increasing the output regulated voltage) and it must be con-

sidered when setting the overcurrent threshold of both the sections. This current results:

Equation 10

where dVOUT / dTVID depends on the specific command issued (10 mV/µsec. for

SetVID_Fast and 2.5 mV/

µsec. for SetVID_Slow). Surpassing the total OC threshold during

the dynamic VID causes the device to latch and disable. Set proper filtering on ILIM to pre-

vent from false total-OC tripping.

As soon as the controller receives a new valid command to set the VID level for one (or

both) of the two sections, the reference of the involved section steps up or down according

to the target VID with the programmed slope until the new code is reached. If a new valid

command is issued during the transition, the device updates the target-VID level and

performs the dynamic transition up to the new code. OV and UV are masked during the

transition and re-activated with proper delay after the end of the transition to prevent false

triggering.

6.9

DVID optimization: REF

A high slew-rate for dynamic VID transitions cause overshoot and undershoot on the

regulated voltage, causing a violation in the microprocessor requirement. To compensate for

this behavior and to remove any undershoot in the transition, each section features a DVID

optimization circuit.

The reference used for the regulation is available on the REF/SREF pin (see Figure 10).

Connect an RREF/CREF to GND to optimize the DVID behavior. The components may be

designed as follows:

Equation 11

where

∆Vosc is the PWM ramp and kV the gain for the voltage loop (see Section 11).

During a DVID transition, the REF pin moves according to the command issued

(SetVIDFast, SetVIDSlow); the current requested to charge/discharge the RREF/CREF

network is mirrored and added to the droop current compensating for undershoot on the

regulated voltage.

Optimization through the REF pin is active only for downward VID transition.

DVID

OUT

VID

------------------

⋅

REF

∆V

OSC

⋅

----------------------

–

⎝⎠

⎛⎞

⋅

REF

⋅

REF

----------------------

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