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L6491 датащи(PDF) 12 Page - STMicroelectronics |
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L6491 датащи(HTML) 12 Page - STMicroelectronics |
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12 / 24 page ![]() Electrical characteristics L6491 12/24 DocID024832 Rev 1 Driving buffer section Iso 8, 13 High/low-side source peak current LVG/HVG ON TJ = 25 °C 3.5 4 A Full temperature range 2.5 A Isi High/low-side sink peak current LVG/HVG OFF TJ = 25 °C 3.5 4 A Full temperature range 2.5 A Logic inputs Vil 1, 2, 3 Low level logic threshold 0.95 1.45 V Vih High level logic threshold voltage 22.5 V VSSD 2 SmartSD unlatch threshold 0.8 V Vil_S 1, 3 Single input voltage LIN and HIN connected together and floating 0.8 V IHINh 3 HIN logic “1” input bias current HIN = 15 V 120 200 260 A IHINl HIN logic “0” input bias current HIN = 0 V 1 A ILINl 1 LIN logic “0” input bias current LIN = 0 V 5 10 15 A ILINh LIN logic “1” input bias current LIN = 15 V 1 A ISDh 2 SD logic “1” input bias current SD = 15 V 20 40 60 A ISDl SD logic “0” input bias current SD = 0 V 1 A 1. VBO = Vboot - Vout. 2. RDS(on) is tested in the following way: RDS(on) = [(VCC - VBOOT1) - (VCC - VBOOT2)] / [I1(VCC, VBOOT1) - I2(VCC, VBOOT2)] where I1 is pin 14 current when VBOOT = VBOOT1, I2 when VBOOT = VBOOT2. Table 8. DC operation electrical characteristics (VCC = 15 V; PGND = SGND; TJ = + 25 °C) (continued) Symbol Pin Parameter Test conditions Min. Typ. Max. Unit |
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