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LM341 датащи(PDF) 14 Page - Texas Instruments |
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LM341 датащи(HTML) 14 Page - Texas Instruments |
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14 / 22 page ![]() 14 LM341, LM78M05 SNVS090F – MAY 2004 – REVISED DECEMBER 2016 www.ti.com Product Folder Links: LM341 LM78M05 Submit Documentation Feedback Copyright © 2004–2016, Texas Instruments Incorporated Thermal Considerations (continued) The case temperature is measured at the point where the leads contact the mounting pad surface Figure 16. Cross-Sectional View of Integrated Circuit Mounted on a Printed-Circuit Board The LM341 and LM78M05 regulators have internal thermal shutdown to protect the device from overheating. Under all possible operating conditions, the junction temperature of the LM341 and LM78M05 must be within the range of 0°C to 125°C. A heat sink may be required depending on the maximum power dissipation and maximum ambient temperature of the application. To determine if a heat sink is needed, the power dissipated by the regulator (PD) is calculated using Equation 1. IIN = IL + IG (1) PD = (VIN – VOUT) × IL + (VIN × IG) (2) Figure 17 shows the voltages and currents which are present in the circuit. Figure 17. Power Dissipation Diagram The next parameter which must be calculated is the maximum allowable temperature rise, TR(MAX). TR(MAX) = TJ(MAX) – TA(MAX) where • TJ(MAX) is the maximum allowable junction temperature (125°C) • TA(MAX) is the maximum ambient temperature encountered in the application Using the calculated values for TR(MAX) and PD, the maximum allowable value for the junction-to-ambient thermal resistance (RθJA) can be calculated with Equation 3. RθJA = TR(MAX) / PD (3) As a design aid, Table 2 shows the value of the RθJA of TO-252 for different heat sink area. The copper patterns that we used to measure these RθJA are shown at the end of AN–1028 Maximum Power Enhancement Techniques for Power Packages (SNVA036). Figure 12 reflects the same test results as what are in the Table 2. Figure 13 shows the maximum allowable power dissipation versus ambient temperature for the PFM device. Figure 14 shows the maximum allowable power dissipation versus copper area (in2) for the TO-252 device. For power enhancement techniques to be used with TO-252 package, see AN–1028 Maximum Power Enhancement Techniques for Power Packages (SNVA036). |
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