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PC87309VLJ датащи(PDF) 180 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали PC87309VLJ
подробное описание детали  PC87309 SuperI/O Plug and Play Compatible Chip in Compact 100-Pin VLJ Packaging
PDF  192 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

PC87309VLJ датащи(HTML) 180 Page - National Semiconductor (TI)

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Device Specifications
180
www.national.com
10.3.10 FDC DMA Timing
1. tDRP and tICP are defined in TABLE "" on page 171.
2. Only in case of pending DRQ.
3. Values shown are with the FIFO disabled, or with FIFO enabled and THRESH = 0. For nonzero values
of THRESH, add (THRESH x 8 x tDRP) to the values shown.
4. The active edge of RD or WR and TC is recognized only when DACK is active.
Symbol
Parameter
Min
Max
Unit
tKI
DACK Inactive Pulse Width
25
nsec
tKK
DACK Active Pulse Width
65
nsec
tKQ
DACK Active Edge to DRQ Inactive
65
nsec
tQK
DRQ to DACK Active Edge
10
nsec
tQP
DRQ Period (Except Non-Burst DMA)
8 x tDRP
1
tQQ
DRQ Inactive Non-Burst Pulse Width
300
4002
nsec
tQR
DRQ to RD, WR Active
15
nsec
tQW
DRQ to End of RD, WR (DRQ Service Time)
(8 x tDRP) − (16 x tICP)
13
tQT
DRQ to TC Active (DRQ Service Time)
(8 x tDRP) − (16 x tICP)
1 3
tRQ
RD, WR Active Edge to DRQ Inactive 4
65
nsec
tTQ
TC Active Edge to DRQ Inactive
75
nsec
tTT
TC Active Pulse Width
50
nsec
tQK
tKQ
tQP
tTT
tKK
tQR
tQQ
tKI
tQW
tRQ
tQT
tTQ
DRQ
DACK
RD, WR
TC



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