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PC8477B датащи(PDF) 24 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали PC8477B
подробное описание детали  Advanced Floppy Disk Controller
PDF  54 Pages
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производитель  NSC [National Semiconductor (TI)]
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PC8477B датащи(HTML) 24 Page - National Semiconductor (TI)

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40 Command Set Description (Continued)
TABLE 4-4 Effect of Drive Mode and Data Rate on Format and Write Commands
Drive
GAP2 Length
Portion of GAP2
Data Rate
Mode
Written During
Re-Written by Write
Format
Data Command
250300500 kbs
Conventional
22 bytes
0 bytes
Perpendicular
22 bytes
19 bytes
1 Mbs
Conventional
22 bytes
0 bytes
Perpendicular
41 bytes
38 bytes
TABLE 4-4A Effect of GAP and WG on Format and Write Commands
Mode
GAP2 Length
Portion of GAP2
GAP
WG
Description
Written During
Re-Written by Write
Format
Data Command
0
0
Conventional
22 bytes
0 bytes
0
1
Perpendicular
22 bytes
19 bytes
(s500 kbs)
1
0
Reserved
22 bytes
0 bytes
(Conventional)
1
1
Perpendicular
41 bytes
38 bytes
(1 Mbs)
Perpendicular Recording type disk drives have a Pre-Erase
Head which leads the ReadWrite Head by 200 mm which
translates to 38 bytes at the 1 Mbs data transfer rate (19
bytes at 500 kbs) The increased spacing between the two
heads requires a larger GAP2 between the Address Field
and Data Field of a sector at 1 Mbs (See Perpendicular
Format in Table 4-1) This GAP2 length of 41 bytes (at
1 Mbs) will ensure that the Preamble in the Data Field is
completely ‘‘pre-erased’’ by the Pre-Erase Head Also dur-
ing Write Data operations to a perpendicular drive a portion
of GAP2 must be rewritten by the controller to guarantee
that the Data Field Preamble has been pre-erased (see Ta-
ble 4-4)
429 Read Data Command
The Read Data command reads logical sectors containing a
Normal Data AM from the selected drive and makes the
data available to the host mP After the last Command
Phase byte is written the controller will simulate the Motor
On Time for the selected drive internally The user must turn
on the drive motor directly by enabling the appropriate drive
and motor select disk interface outputs with the Digital Out-
put Register (DOR)
If Implied Seeks are enabled the controller will perform a
Seek operation to the track number specified in the Com-
mand Phase The controller will also issue a Sense Interrupt
for the seek and wait the Head Settle time specified in the
Mode command
The correct ID information (track head sector bytes per
sector) for the desired sector must be specified in the com-
mand bytes See Table 4-5 Sector Size Selection for details
on the bytes per sector code In addition the End of Track
Sector Number (EOT) should be specified allowing the con-
troller to read multiple sectors The Data Length byte is a
don’t care and should be set to FF (hex)
TABLE 4-5 Sector Size Selection
Bytes per
Number of Bytes
Sector Code
in Data Field
0
128
1
256
2
512
3
1024
4
2048
5
4096
6
8192
7
16384
The controller then starts the Data Separator and waits for
the Data Separator to find the next sector Address Field
The controller compares the Address Field ID information
(track head sector bytes per sector) with the desired ID
specified in the Command Phase If the sector ID bytes do
not match then the controller waits for the Data Separator
to find the next sector Address Field The ID comparison
process repeats until the Data Separator finds a sector Ad-
dress Field ID that matches that in the command bytes or
until an error occurs Possible errors are
1 The mP aborted the command by writing to the FIFO If
there is no disk in the drive the controller will hang up
The mP must then take the controller out of this hung
state by writing a byte to the FIFO This will put the con-
troller into the Result Phase
2 Two index pulses were detected since the search began
and no valid ID has been found If the track address ID
differs the WT bit or BT bit (if the track address is FF hex)
will be set in ST2 If the head sector or bytes per sector
code did not match the ND bit is set in ST1 If the Ad-
dress Field AM was never found the MA bit is set in ST1
3 The Address Field was found with a CRC error The CE
bit is set in ST1
24



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