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OMAP3530ECUS72 датащи(PDF) 38 Page - Texas Instruments

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номер детали OMAP3530ECUS72
подробное описание детали  Applications Processors
PDF  265 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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OMAP3530ECUS72 датащи(HTML) 38 Page - Texas Instruments

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OMAP3530, OMAP3525
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
www.ti.com
Table 2-1. Ball Characteristics (CBB Pkg.)(1) (continued)
BALL
BALL TOP
PIN NAME
MODE [4]
TYPE [5]
BALL
BALL
RESET REL. POWER [9]
HYS [10]
BUFFER
PULLUP
IO CELL [13]
BOTTOM [1] [2]
[3]
RESET
RESET REL. MODE [8]
STRENG TH /DOWN
STATE [6]
STATE [7]
(mA) [11]
TYPE [12]
gpio_150
4
IO
hsusb3_tll_cl 5
O
k
safe_mode
7
Y8
NA
uart1_rx
0
I
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
mcbsp1_ clkr 2
IO
mcspi4_clk
3
IO
gpio_151
4
IO
safe_mode
7
AE1
NA
mcbsp4_
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
clkx
gpio_152
4
IO
hsusb3_tll_
5
IO
data1
mm3_txse0
6
IO
safe_mode
7
AD1
NA
mcbsp4_dr
0
I
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
gpio_153
4
IO
hsusb3_tll_
5
IO
data0
mm3_rxrcv
6
IO
safe_mode
7
AD2
NA
mcbsp4_dx
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
gpio_154
4
IO
hsusb3_tll_
5
IO
data2
mm3_txdat
6
IO
safe_mode
7
AC1
NA
mcbsp4_fsx
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
gpio_155
4
IO
hsusb3_tll_
5
IO
data3
mm3_txen_n 6
IO
safe_mode
7
Y21
NA
mcbsp1_ clkr 0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
mcspi4_clk
1
IO
gpio_156
4
IO
safe_mode
7
AA21
NA
mcbsp1_fsr
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
cam_global_r 2
IO
eset
gpio_157
4
IO
safe_mode
7
V21
NA
mcbsp1_dx
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
mcspi4_
1
IO
simo
mcbsp3_dx
2
IO
gpio_158
4
IO
safe_mode
7
U21
NA
mcbsp1_dr
0
I
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
mcspi4_
1
IO
somi
mcbsp3_dr
2
O
gpio_159
4
IO
safe_mode
7
T21
NA
mcbsp_clks
0
I
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
cam_ shutter 2
O
gpio_160
4
IO
38
TERMINAL DESCRIPTION
Copyright © 2008–2013, Texas Instruments Incorporated
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Product Folder Links: OMAP3530 OMAP3525



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