L3GD20H datasheet(27/52 Pages) STMICROELECTRONICS

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L3GD20H

Digital interfaces

The registers embedded inside the L3GD20H may be accessed through both the I

C and

SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire

interface mode.

The serial interfaces are mapped onto the same pins. To select/exploit the I

C interface, CS

line must be tied high (i.e connected to Vdd_IO).

5.1

I2C serial interface

The L3GD20H I

C is a bus slave. The I

C is employed to write data into registers whose

content can also be read back.

The relevant I

C terminology is given in the table below.

There are two signals associated with the I

C bus: the serial clock line (SCL) and the serial

data line (SDA). The latter is a bidirectional line used for sending and receiving the data

to/from the interface. Both the lines must be connected to Vdd_IO through external pull-up

resistor. When the bus is free both the lines are high.

The I

C interface is compliant with fast mode (400 kHz) I

C standards as well as with the

normal mode.

Table 10. Serial interface pin description

Pin name

Pin description

SPI enable

C/SPI mode selection (1: I

C mode; 0: SPI enabled)

SCL/SPC

C Serial Clock (SCL)

SPI Serial Port Clock (SPC)

SDA/SDI/SDO

C Serial Data (SDA)

SPI Serial Data Input (SDI)

3-wire Interface Serial Data Output (SDO)

SDO/SA0

SPI Serial Data Output (SDO)

C less significant bit of the device address

Table 11. I2C terminology

Term

Description

Transmitter

The device which sends data to the bus

Receiver

The device which receives data from the bus

Master

The device which initiates a transfer, generates clock signals and terminates a

transfer

Slave

The device addressed by the master

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