Microsemi

Integrated Products, Power Management

11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570

Page 2

Copyright

 2001

Rev. 1.1a, 2003-03-21

RangeMAX™

LX1688

I N T E GRA T ED

PR ODUC T S

ABSOLUTE MAXIMUM RATINGS

PACKAGE PIN OUT

BEPOL

VDD

A

OUT

(Top View)

2

3

4

5

6

7

8

9

10

11

12

1

23

22

21

20

19

18

17

16

15

14

13

24

VSS_P

BRITE

CPOR

ENABLE

I_R

CPWM1

CPWM2

RMP_RST

PHA_SYNC

VDD_P

VDDSW

TRI_C

OLSNS

ISNS

ICOMP

VCOMP

VSNS

SLAVE

FAULT

B

OUT

VSS

TH ERMAL DATA

THERMAL RESISTANCE

θ

JA

100°C/W

The

system. All of the above assume no ambient airflow.

FUNCTIONAL PIN DESCRIPTION

Pin Name

Description

Pin Name

Description

Output Driver A

Output Driver B

VSS_P

Connects to dedicated GND for Aout and

Bout Drivers

VDD_P

Connects to dedicated VDD for Aout and

Bout Drivers

VSS

Connects to analog GND

VDD

Connects to analog VDD

BEPOL

Tri-mode input pin to control the polarity of

the ENABLE and BRITE signal

VDDSW

Switchable VDD output controlled by

ENABLE

BRITE

Analog/PWM input for brightness control

TRI_C

CPOR

VDD and is used for setting power-up reset

pulse width.

OLSNS

Analog input to detect open-lamp condition

ENABLE

Used to enable or disable the chip

ISNS

Analog input from lamp current, has built-in

300mv offset

I_R

current setting for internal oscillator

ICOMP

Current error Amp’s output; connects to

CPWM1

for integrating an external digital PWM

signal for analog dimming

VCOMP

Voltage error Amp’s output; connects to

soft-start

CPWM2

for integrating an external digital PWM

signal for analog dimming.

VSNS

Analog input from transformer output

voltage

RMP_RST

If SLAVE = “0”, RMP_RST is a CMOS

output; if SLAVE = “1”, it is a CMOS input

that locks the ramp oscillation frequency to

the master clock

SLAVE

Input control pin for setting the IC either in

Master or Slave mode; “1” for slave mode

and “0” for master mode.

PHA_SYNC

If SLAVE= “0”, PHA_SYNC is a CMOS

output; if SLAVE = “1”, it is a CMOS input

that

make

the

phase

synchronous with the master

FAULT

Digital output to indicate maximum number

of lamp striking attempts has occurred

without lamp ignition.

Supply Voltage (VDD_P, VDD) ....................................................................... 6.5V

Operating Junction Temperature ..................................................................125°C

Storage Temperature....................................................................................150°C

Lead Temperature (Soldering, 10 Seconds) .................................................300°C

Note 1: Exceeding these ratings could cause damage to the device. All voltages are with

respect to Ground. Currents are positive into, negative out of the specified terminal.