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ST25RU3993 датащи(PDF) 39 Page - STMicroelectronics

номер детали ST25RU3993
подробное описание детали  Integrated supply regulators
PDF  90 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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ST25RU3993 датащи(HTML) 39 Page - STMicroelectronics

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ST25RU3993
Functional overview
45
for further processing. The chosen signal channel can be seen by reading the in_select
status bit in the AGL/VCO/F_CAL/PilotFreq status display register (r2Cpage[1:0] = 00)
(2Ah). This bit is valid from the end of the preamble until the start of the next transmission.
For FM0 Rx encoding the selection is based on the evaluation of the digital representation of
the received sub-carriers at the beginning of the data packet. For Miller Rx encoding the
selection is supported by the logarithmic RSSI measurement. RSSI will be taken into
account if at least one RSSI reading (I or Q) is higher than defined by the IQsel_Th[3:0]
option bits in the Interrogator collision detection and IQ selection settings register (1Dh).
Further improvements can be achieved by taking noise RSSI into account. To enable this
mode (an active RF field and all mixer and gain settings as used for the subsequent
reception are required) send the direct commands Enable Rx (97h) and Store RSSI (A8h).
As a result only the difference between actual pilot RSSI and the stored noise RSSI will
contribute to the IQ decision.
2.9.6
Bit decoder
The bit decoder converts the sub-carrier coded signals to a bit stream data according to the
protocol defined by the option bits RX_cod[2:0 and RX_LF[3:0] in the Rx options register
(03h). The system extracts the data clock and serial data bits, and removes the preamble.
The decoder logic is designed for maximum error tolerance to enable successful decoding
of partly corrupted sub-carrier signals due to noise or interference. In the EPC Class1 Gen2
protocol, the decoder supports long Rx preamble (TRext = 1) for FM0, and all Miller
encoded signals. Short Rx preamble (TRext = 0) is supported for Miller4 and Miller8
encoded signals.
2.9.7
Data framer
In the data framer, the serial bit stream is formatted into bytes. The CRC bytes are checked
and removed leaving pure baseband data, which is sent to the 24-byte FIFO register from
where it can be read out by the MCU. The receiver also supports transfer of incomplete
bytes.
2.10
Data reception modes
The device can operate in the normal mode or in direct mode.
2.10.1
Rx normal mode
In the normal mode the received data is stored in FIFO.
Reception start
The reception is triggered automatically at the end of the data transmission.
The second option to start the reception is done manually by sending the direct command
Enable Rx (97h). For correct operation, the dir_mode bit in the Protocol selection register
(01h) should be set to 0.
The third possibility to start reception is using one of the AutoACK modes, which
automatically triggers the reception to acquire PC+EPC and Handle.



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