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ST1S31 датащи(PDF) 13 Page - STMicroelectronics |
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ST1S31 датащи(HTML) 13 Page - STMicroelectronics |
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13 / 35 page ![]() DocID022998 Rev 4 13/35 ST1S31 Functional description 35 The embedded compensation network is RC = 80 k, CC = 55 pF while CP and CO can be considered as negligible. The error amplifier output resistance is 96 M so the relevant singularities are: Equation 13 So closing the loop, the loop gain GLOOP(s) is: Equation 14 Example 1: VIN = 5 V, VOUT = 1.2 V, Iomax = 3 A, L = 1.0 H, Cout = 47 µF (MLCC), R1 = 10 k, R2 = 20 k (see Section 5.2 and Section 5.3 for inductor and output capacitor selection guidelines). The module and phase bode plot are reported in Figure 7 and Figure 8. The bandwidth is 117 kHz and the phase margin is 63 degrees. Figure 7. Module bode plot fZ 36 2 kHz = fP LF 30 Hz = GLOOP s GCO s G DIV s G EA s = |
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