YMF721 datasheet(8/41 Pages) LSI

8 / 41 page

YMF721

July 10, 1997

- 8 -

1-2. System without MPU401 UART

This section describes an example of a system that does not have MPU401 UART in it.

In this example, MPU401 UART of YMF721 (OPL4-ML2) is used.

FM synthesizer of this LSI is compatible with applications that support AdLib/Sound Blaster, and Wavetable

synthesizer is compatible with applications that support MPU401.

Note :

For the above case, MPU401 port of YMF721 (OPL4-ML2) must be made active because the system does not

have MPU401 UART in it. Addresses of standard ports through which reading or writing of registers of

YMF721 (OPL4-ML2) is made are as follows.

1) /OPLCS

: 388 - 38Fh (8byte)

2) /MPUCS

: 330 - 331h (2byte)

As a source of master clock for YMF721 (OPL4-ML2), use a crystal oscillator by connecting it to XI and

XO pins, or use the clock of 33.8688 MHz from the system. Connect BCO, LRO, DO2, /PDOUT and

CLKO directly to YAC516 (DAC16-L) as shown to convert serial data output to analog signal. Then, it is

recommended to amplify the volume of source of YMF721 through the suitable gain as shown for the

purpose of equalizing the volumes of multiple sources.

IOCHRDY

SA2-0

SA15-0

AEN

RESETDRV

/IOW

/IOR

SD7-0

ARDY

RESET

A2-0

/IOW

/IOR

ADB7-0

ABDIR

Lch

Lch out

Rch

Rch out

LRCK

MCLK

/PDIN

BCLK

SDATA

/OPLCS

/MPUCS

FSP

RXD

/PDOUT

CLKO

BCO

LRO

DO2

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