ADV7312 datasheet(21/84 Pages) AD

21 / 84 page

REV. 0

ADV7312

–21–

NOTES

1When set to 0, the line and field counters automatically wrap around at the end of the field/frame of the standard selected. When set to 1, the field/line counters are

free running and wrap around when external sync signals indicate so.

2Adaptive Filter mode is not available in PS only @ 54 MHz input mode.

SR7–

SR0

Bit Description

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Reset

Values

13h

HD Cr/Cb Sequence

Cb after falling edge of

HSYNC

1Cr after falling edge of

HSYNC

Reserved

00 must be written to this

bit

HD Input Format

0 must be written here.

Disabled

Enabled

Reserved

0 must be written to this

bit

HD Chroma SSAF

Disabled

Enabled

HD Chroma Input

4:4:4

4:2:2

HD Double Buffering

Disabled

Enabled

14h

HD Mode

HD Timing Reset

xA low-high-low transition

resets the internal HD

timing counters

00h

30 Hz/2200 total

samples/lines

25 Hz/2640 total

samples/lines

Reserved

0 must be written to these

bits

VSYNC/Field Input

0 = Field Input

1 =

VSYNC Input

Lines/Frame1

Update field/line counter

Field/line counter free

running

15h

00 must be written to this

bit

00h

0Disabled

Enabled

Disabled

Enabled

DAC E = Pb;

DAC F = Pr

DAC E = Pr;

DAC F = Pb

Gamma Curve A

1Gamma Curve B

Disabled

1Enabled

Mode A

Mode B

Disabled

1Enabled

HD Mode

HD RGB Input

HD Sync on PrPb

Sinc Filter on DAC D, E, F

1080i Frame Rate

HD Adaptive Filter Enable

HD Color DAC Swap

HD Gamma Curve A/B

HD Gamma Curve Enable

HD Adaptive Filter Mode

4Ch

Reserved

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