6

S4242/S42WD42/S4261/S42WD61

2025 6.0 4/17/00

PIN CONFIGURATIONS

FIGURE 6. TYPICAL SYSTEM CONFIGURATION USING A PUSH BUTTON RESET AND BATTERY MONITOR CIRCUIT

VLOW#

RESET#

VSENSE

GND

VCC

RESET

SCL

SDA

1

2

3

4

8

7

6

5

8-Pin PDIP

or 8-Pin SOIC

2025 T PCon 2.0

PIN NAMES

VCC = 5.0V ±10%

VLOW#

RESET#

VSENSE

GND

VCC

RESET

SCL

SDA

S42xxx

RESET#

SCL

SDA

SCL

SDA

RESET#

General

Purpose

MCU

2025 T fig07 2.0

SECOND CARD

VOLTAGE

3.0V ±5%

VCC = 3.0V or 5.0V

VLOW#

RESET#

VSENSE

GND

VCC

RESET

SCL

SDA

S42xxx

RESET#

SCL

SDA

RST

SCL (P0.0)

SDA (P0.1)

INTO (P1.5)

8051 Type

MCU

PB_RST#

2025 T fig06 2.0

VBAT

TRIP

VBAT TO

REGULATOR

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