www.irf.com

5

IR2136(2)(3)(5)(6)(7)(8)(J&S) &(PbF)

VCC

VBS

ITRIP

ENABLE

FAULT

LO1,2,3

HO1,2,3

<UVCC

X

X

X

0 (note 1)

0

0

15V

<UVBS

0V

5V

high imp

LIN1,2,3

0

15V

15V

0V

5V

high imp

LIN1,2,3

HIN1,2,3

15V

15V

>VITRIP

5V

0 (note 2)

0

0

15V

15V

0V

0V

high imp

0

0

Note: A shoot-through prevention logic prevents LO1,2,3 and HO1,2,3 for each channel from turning on simultaneously.

Note 1: UVCC is not latched, when VCC>UVCC, FAULT returns to high impedance.

NOTE: For high side PWM, HIN pulse width must be

≥ 1µsec

Dynamic Electrical Characteristics

Symbol

Definition

Min.

Typ.

Max. Units Test Conditions

ton

Turn-on propagation delay

IR2136(2)(3)(5)(8)

300

425

550

IR21366(7)

—

250

—

toff

Turn-off propagation delay

IR2136(2)(3)(5)(8)

250

400

550

IR21366(7)

—

180

—

tr

Turn-on rise time

—

125

190

tf

Turn-off fall time

—

50

75

tEN

ENABLE low to output

IR2136(2)(3)(5)(8)

300

450

600

shutdown propagation delay

IR21366(7)

100

250

400

tITRIP

ITRIP to output shutdown propagation delay

500

750

1000

tbl

ITRIP blanking time

100

150

—

tFLT

ITRIP to FAULT propagation delay

400

600

800

tFILIN

Input filter time (HIN, LIN, EN)

100

200

—

(IR2136(2)(3)(5)(8) only)

tFLTCLR

FAULT clear time RCIN: R=2meg, C=1nF

1.3

1.65

2

mS

DT

Deadtime

220

290

360

MT

Matching delay ON and OFF

—

40

75

MDT

Matching delay, max (ton,toff) - min (ton,toff),

—

25

70

(ton,toff are applicable to all 3 channels)

PM

Output pulse width matching, PWin -PWout (fig.2)

—

40

75

nS

nS

External dead

time

>400nsec