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SUM50N03 датащи(PDF) 2 Page - Vishay Siliconix |
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SUM50N03 датащи(HTML) 2 Page - Vishay Siliconix |
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2 / 3 page ![]() SPICE Device Model SUM50N03-13LC Vishay Siliconix www.vishay.com Document Number: 71918 2 09-Jun-04 SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED) Parameter Symbol Test Conditions Simulated Data Measured Data Unit Static Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250 µA 1.8 V On-State Drain Current a ID(on) VDS = 5 V, VGS = 10 V 434 A VGS = 10 V, ID = 25 A 0.010 0.010 VGS = 10 V, ID = 25 A, TJ = 125°C 0.016 0.016 VGS = 10 V, ID = 25 A, TJ = 175°C 0.018 0.018 Drain-Source On-State Resistance a rDS(on) VGS = 4.5 V, ID = 24 A 0.014 0.014 Ω Forward Voltage a VSD IS = 50 A, VGS = 0 V 0.90 1.3 V Dynamic b Input Capacitance Ciss 2009 1960 Output Capacitance Coss 367 380 Reverse Transfer Capacitance Crss VGS = 0 V, VDS = 25 V, f = 1 MHz 111 180 pF Total Gate Charge c Qg 34 35 Gate-Source Charge c Qgs 7.6 7.6 Gate-Drain Charge c Qgd VDS = 15 V, VGS = 10 V, ID = 50 A 5.6 5.6 nC Turn-On Delay Time c td(on) 23 10 Rise Time c tr 19 93 Turn-Off Delay Time c td(off) 8 30 Fall Time c tf VDD = 15 V, RL = 0.30 Ω ID ≅ 50 A, VGEN = 10 V, RG = 2.5 Ω 10 10 Reverse Recovery Time trr IF = 50,A di/dt = 100 A/µs 29 35 ns Notes a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2%. b. Guaranteed by design, not subject to production testing. c. Independent of operating temperature. |
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