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DS21352L датащи(PDF) 21 Page - Dallas Semiconductor |
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DS21352L датащи(HTML) 21 Page - Dallas Semiconductor |
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21 / 137 page ![]() DS21352/DS21552 21 of 137 4.1.3 PARALLEL CONTROL PORT PINS Signal Name: INT* Signal Description: Interrupt Signal Type: Output Flags host controller during conditions and change of conditions defined in the Status Registers 1 and 2 and the HDLC Status Register. Active low, open drain output Signal Name: FMS Signal Description: Framer Mode Select Signal Type: Input Selects the DS2152 mode when high or the DS21352/552 mode when low. If high, the JTRST is internally pulled low. If low, JTRST has normal JTAG functionality. This pin has a 10k pull up resistor. Signal Name: TEST Signal Description: 3–State Control Signal Type: Input Set high to 3–state all output and I/O pins (including the parallel control port) when FMS = 1 or when FMS = 0 and JTRST* is tied low. Set low for normal operation. Ignored when FMS = 0 and JTRST* = 1. Useful for board level testing. Signal Name: MUX Signal Description: Bus Operation Signal Type: Input Set low to select non–multiplexed bus operation. Set high to select multiplexed bus operation. Signal Name: AD0 TO AD7 Signal Description: Data Bus [D0 to D7] or Address/Data Bus Signal Type: Input In non–multiplexed bus operation (MUX = 0), serves as the data bus. In multiplexed bus operation (MUX = 1), serves as a 8– bit multiplexed address / data bus. Signal Name: A0 TO A6 Signal Description: Address Bus Signal Type: Input In non–multiplexed bus operation (MUX = 0), serves as the address bus. In multiplexed bus operation (MUX = 1), these pins are not used and should be tied low. Signal Name: BTS Signal Description: Bus Type Select Signal Type: Input Strap high to select Motorola bus timing; strap low to select Intel bus timing. This pin controls the function of the RD*(DS*), ALE(AS), and WR*(R/W*) pins. If BTS = 1, then these pins assume the function listed in parenthesis (). Signal Name: RD*(DS*) Signal Description: Read Input - Data Strobe Signal Type: Input RD* and DS* are active low signals. DS active HIGH when MUX = 0. See bus timing diagrams. |
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