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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LM87CIMT датащи(PDF) 2 Page - National Semiconductor (TI) |
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LM87CIMT датащи(HTML) 2 Page - National Semiconductor (TI) |
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2 / 32 page  Block Diagram 10099501 Pin Description Pin Name(s) Pin Number Number of Pins Type Description ADD/NTEST_OUT 1 1 Digital I/0 This pin normally functions as a three-state input that controls the two LSBs of the Serial Bus Address. When this pin is tied to V CC the two LSBs are 01. When tied to Ground, the two LSBs are 10. If this pin is not connected, the two LSBs are 00. This pin also functions as an output during NAND Tree tests (board-level connectivity testing). To ensure proper NAND tree function, this pin should not be tied directly to V CC or Ground. Instead, a series 5 k Ω resistor should be used to allow the test output function to work. Refer to SECTION 11 on NAND Tree testing. THERM# 2 1 Digital I/O This pin functions as an open-drain interrupt output for temperature interrupts only, or as an interrupt input for fan control. It has an on-chip 100 k Ω pullup resistor. SMBData 3 1 Digital I/O Serial Bus bidirectional Data. Open-drain output. SMBCLK 4 1 Digital Input Serial Bus Clock. FAN1/AIN1- FAN2/AIN2 5-6 2 Analog/Digital Inputs Programmable as analog inputs (0 to 2.5V) or digital Schmitt Trigger fan tachometer inputs. CI 7 1 Digital I/O An active high input from an external circuit which latches a Chassis Intrusion event. This line can go high without any clamping action regardless of the powered state of the LM87. There is also an internal open-drain output on this line, controlled by Bit 7 of the CI Clear Register (46h), to provide a minimum 20 ms pulse. www.national.com 2 |
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