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X9409 датащи(PDF) 2 Page - Xicor Inc.

номер детали X9409
подробное описание детали  Quad Digitally Controlled Potentiometers
PDF  21 Pages
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производитель  XICOR [Xicor Inc.]
домашняя страница  http://www.xicor.com
Logo XICOR - Xicor Inc.

X9409 датащи(HTML) 2 Page - Xicor Inc.

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X9409 – Preliminary Information
Characteristics subject to change without notice.
2 of 21
REV 1.6 1/30/03
www.xicor.com
PIN DESCRIPTIONS
Host Interface Pins
Serial Clock (SCL)
The SCL input is used to clock data into and out of the
X9409.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into
and out of the device. It is an open drain output and
may be wire-ORed with any number of open drain or
open collector outputs. An open drain output requires
the use of a pull-up resistor. For selecting typical
values, refer to the guidelines for calculating typical
values on the bus pull-up resistors graph.
Device Address (A0–A3)
The address inputs are used to set the least significant
4 bits of the 8-bit slave address. A match in the slave
address serial data stream must be made with the
address input in order to initiate communication with
the X9409. A maximum of 16 devices may occupy the
2-wire serial bus.
Potentiometer Pins
VH0/RH0–VH3/RH3, VL0/RL0–VL3/RL3
The VH/RH and VL/RL inputs are equivalent to the
terminal connections on either end of a mechanical
potentiometer.
VW0/RW0–VW3/RW3
The wiper outputs are equivalent to the wiper output of
a mechanical potentiometer.
Hardware Write Protect Input (WP)
The WP pin when low prevents nonvolatile writes to
the Data Registers.
PIN NAMES
Symbol
Description
SCL
Serial Clock
SDA
Serial Data
A0-A3
Device Address
VH0/RH0–VH3/RH3,
VL0/RL0–VL3/RL3
Potentiometer Pin
(terminal equivalent)
VW0/RW0–VW3/RW3
Potentiometer Pin
(wiper equivalent)
WP
Hardware Write Protection
VCC
System Supply Voltage
VSS
System Ground (Digital)
NC
No Connection
PIN CONFIGURATION
VCC
VL0/RL0
VH0/RH0
WP
SDA
A1
1
2
3
4
5
6
7
8
9
10
24
23
22
21
20
19
18
17
16
15
NC
VL3/RL3
VH3/RH3
VW3/RW3
A0
NC
A3
SCL
VL2/RL2
VH2/RH2
SOIC
X9409
V
SS
VW0/RW0
14
13
11
12
A2
VL1/RL1
VH1/RH1
VW1/RW1
VW2/RW2
NC
SDA
A1
VH2/RH2
1
2
3
4
5
6
7
8
9
10
24
23
22
21
20
19
18
17
16
15
WP
A2
VW0/RW0
VCC
NC
VL3/RL3
VH3/RH3
VW3/RW3
TSSOP
X9409
VW2/RW2
14
13
11
12
A3
VL1/RL1
VH1/RH1
VW1/RW1
A0
NC
VH0/RH0
NC
SCL
VL2/RL2
VL0/RL0
VSS
2
3
4
A
B
C
D
E
F
Top View–Bumps Down
VW0/RW0
VL0/RL0
NC
A 0
A3
VL1/RL1
VCC
VL3/RL3
VW3/RW3
NC
SDA
VW1/RW1
SCL
VL2/RL2
WP
NC
VH0/RH0 VH1/RH1
VH3/RH3 VH2/RH2
VSS
VW2/RW2
A2
A1
1
CSP



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