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ZSC31010CEC датащи(PDF) 39 Page - Integrated Device Technology |
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ZSC31010CEC датащи(HTML) 39 Page - Integrated Device Technology |
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39 / 43 page ![]() ZSC31010 Datasheet © 2016 Integrated Device Technology, Inc. 39 January 20, 2016 1 2 3 4 8 7 6 5 Bsink VBP N/C VBN VSS SIG TM VDD Vgate 6 Pin Configuration and Package The standard package of the ZSC31010 is an SOP-8 (3.81 mm / 150 mil body) with a lead-pitch 1.27 mm / 50 mil. Table 6.1 Storage and Soldering Conditions for the SOP-8 Package Parameter Symbol Conditions Min Typ Max Unit Maximum Storage Temperature Tmax_storage Less than 10hrs, before mounting 150 °C Minimum Storage Temperature Tmin_storage Store in original packing only -50 °C Maximum Dry-Bake Temperature Tdrybake Less than100 hrs total, before mounting 125 °C Soldering Peak Temperature Tpeak Less than 30s (IPC/JEDEC-STD-020 Standard) 260 °C Figure 6.1 ZSC31010 Pin-Out Diagram Table 6.2 ZSC31010 Pin Configuration Pin No. Name Description 1 Bsink Optional ground connection for bridge ground. Used for power savings. 2 VBP Positive bridge connection 3 N/C No connection 4 VBN Negative bridge connection 5 Vgate Gate control for external JFET regulation/over-voltage protection 6 VDD Supply voltage (2.7 - 5.5 V) 7 SIG™ ZACwire™ interface (analog out, digital out, calibration interface) 8 VSS Ground supply |
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