2.1 Internal Registers of the LM78

TABLE 1. The internal registers and their corresponding internal LM78 address is as follows:

Register

LM78 Internal Hex

Address

Power on

Value

Notes

(This is the data to be

written to Port x5h)

Configuration Register

40h

0000 1000

Interrupt Status Register 1

41h

0000 0000

Auto-increment to the address of Interrupt Status

Register 2 after a read or write to Port x6h.

Interrupt Status Register 2

42h

0000 0000

SMI Mask Register 1

43h

0000 0000

Auto-increment to the address of SMI Mask

Register 2 after a read or write to Port x6h.

SMI Mask Register 2

44h

0000 0000

NMI Mask Register 1

45h

0000 0000

Auto-increment to the address of NMI Mask

Register 2 after a read or write to Port x6h.

NMI Mask Register 2

46h

0100 0000

VID/Fan Divisor Register

47h

0101 XXXX

The first four bits set the divisor for Fan

Counters 1 and 2. The lower four bits reflect the

state of the VID inputs.

Serial Bus Address Register

48h

0010 1101

Chip Reset/ID Register

49h

0100 0000

POST RAM

00h-1Fh

Auto-increment when written to from Port x0h or

x4h. Auto-increment after a read or write to Port

x6h, with a separate pointer. Auto-incrementing

stops when address 1Fh is reached.

Value RAM

20h-3Fh

Value RAM

60h-7Fh

Auto-increment after a read or write to Port x6h.

Auto-incrementing stops when address 7Fh is

reached.

A typical communication with the LM78 would consist of:

1.

Write to Port x5h the LM78 Internal Address (from col-

umn 2 above) of the desired register. Alternatively, when

both ISA and Serial Bus interfaces are used, the first

step in a communication may be to read Port x5h to

ascertain the state of the Busy bit to avoid contention

with an Serial Bus communication.

2.

Read or write the corresponding registers data with

reads/writes from Port x6h.

The LM78 Internal Address latches, and does not have to be written if it is already pointing at the desired register. The LM78

Internal Address Register is read/write (Bit 7 is read only).

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