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LM6164J/883 датащи(PDF) 4 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
номер детали LM6164J/883
подробное описание детали  High Speed Operational Amplifier
PDF  12 Pages
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производитель  NSC [National Semiconductor (TI)]
домашняя страница  http://www.national.com
Logo NSC - National Semiconductor (TI)

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DC Electrical Characteristics (Continued)
The following specifications apply for Supply Voltage = ±15V, V
CM = 0, RL ≥ 100 kΩ and RS = 50Ω unless otherwise noted.
Boldface limits apply for T
A = TJ = TMIN to TMAX; all other limits TA = TJ = 25˚C.
LM6164
LM6264
LM6364
Symbol
Parameter
Conditions
Typ
Limit
Limit
Limit
Units
(Notes 4, 12)
(Note 4)
(Note 4)
V
O
Output Voltage
Supply = +5V
+14.2
+13.5
+13.5
+13.4
V
Swing
and R
L = 2kΩ
+13.3
+13.3
+13.3
min
−13.4
−13.0
−13.0
−12.9
V
−12.7
−12.8
−12.8
min
Supply = +5V
4.2
3.5
3.5
3.4
V
and R
L = 2kΩ
3.3
3.3
3.3
min
(Note 10)
1.3
1.7
1.7
1.8
V
2.0
1.9
1.9
max
Output Short
Source
65
30
30
30
mA
Circuit Current
20
25
25
min
Sink
65
30
30
30
mA
20
25
25
min
I
S
Supply Current
5.0
6.5
6.5
6.8
mA
6.8
6.7
6.9
min
AC Electrical Characteristics
The following specifications apply for Supply Voltage = ±15V, V
CM = 0, RL ≥ 100 kΩ and RS = 50Ω unless otherwise noted.
Boldface limits apply for T
A = TJ = TMIN to TMAX; all other limits TA = TJ = 25˚C.
LM6164
LM6264
LM6364
Symbol
Parameter
Conditions
Typ
Limit
Limit
Limit
Units
(Notes 4, 12)
(Note 4)
(Note 4)
GBW
Gain-Bandwidth
F = 20 MHz
175
140
140
120
MHz
min
Product
100
120
100
Supply = ±5V
120
SR
Slew Rate
A
V = +5 (Note 9)
300
200
200
200
V/µs
min
180
180
180
Supply = ±5V
200
PBW
Power Bandwidth
V
OUT = 20 VPP
4.5
MHz
T
S
Settling Time
10V Step to 0.1%
100
ns
A
V = −4, RL = 2kΩ
φ
m
Phase Margin
A
V = +5
45
Deg
A
D
Differential Gain
NTSC, A
V = +10
<0.1
%
φ
D
Differential Phase
NTSC, A
V = +10
<0.1
Deg
e
np-p
Input Noise
F = 10 kHz
8
Voltage
i
np-p
Input Noise
F = 10 kHz
1.5
Current
Note 2: Continuous short-circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150˚C.
Note 3: The typical junction-to-ambient thermal resistance of the molded plastic DIP (N) is 105˚C/Watt, the molded plastic SO (M) package is 155˚C/Watt, and the
cerdip (J) package is 125˚C/Watt. All numbers apply for packages soldered directly into a printed circuit board.
Note 4: Limits are guaranteed by testing or correlation.
Note 5: For single supply operation, the following conditions apply: V+ = 5V, V− = 0V, VCM = 2.5V, VOUT = 2.5V. Pin1&Pin8(VOS Adjust) are each connected to
Pin4(V−) to realize maximum output swing. This connection will degrade VOS.
Note 6: CL ≤ 5pF.
Note 7: In order to achieve optimum AC performance, the input stage was designed without protective clamps. Exceeding the maximum differential input voltage re-
sults in reverse breakdown of the base-emitter junction of one of the input transistors and probable degradation of the input parameters (especially VOS,IOS, and
Noise).
Note 8: The average voltage that the weakest pin combinations (those involving Pin 2 or Pin 3) can withstand and still conform to the datasheet limits. The test circuit
used consists of the human body model of 100 pF in series with 1500
Ω.
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