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TAS5100ADAPR датащи(PDF) 8 Page - Texas Instruments

номер детали TAS5100ADAPR
подробное описание детали  TRUE DIGITAL AUDIO AMPLIFIER TAS5100A PWM POWER OUTPUT STAGE
PDF  16 Pages
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производитель  TI [Texas Instruments]
домашняя страница  http://www.ti.com
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TAS5100ADAPR датащи(HTML) 8 Page - Texas Instruments

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TAS5100A
SLES030 – FEBRUARY 2002
8
www.ti.com
device operation
power sequences
system power-up/power-down sequencing
The recommended power-up/power-down sequence is shown in Figure 3. For proper operation the RESET
signal should be kept LOW when both DVDD and output power (PVDDA1, PVDDA2, PVDDB1, and PVDDB2)
are being applied. The RESET signal should remain LOW for at least 1 ms after output power is applied.
> 1 ms
DVDD†
PWDN
PVDDA1
PVDDA2
PVDDB1
PVDDB2
RESET
> 1 ms
> 100
µs
† For most applications, it is recommended that pin 13 (PWDN) be connected directly to pin 6 (DVDD).
Figure 3. Power-Up/Power-Down Sequence
RESET function
The device is put into a reset condition when the (active low) RESET signal is asserted. While in the reset state,
the input H-bridge control signals consisting of PWM_AP, PWM_AM, PWM_BP, and PWM_BM are ignored, and
the H-bridge MOSFETs are placed in a state where OUTPUTA and OUTPUTB are both low. Asserting the
RESET signal low also causes the short circuit protection latch to be reset. The RESET signal is normally
connected to the VALID signal from the TAS5000.
reinitialization sequence
Proper initial conditions for this device include asserting the RESET signal until the reset operation has
completed (1 ms). Additionally, when using this device with the TAS5000 controller, this function can be
accomplished by asserting the reset pin on the TAS5000 during the reset sequence (see Figure 3).
audio application considerations
power supply decoupling
Power supply decoupling and layout optimization information should be obtained by following the detailed
information in the application note SLAA117.
optimal power transfer for H-bridge
The TAS5100A is a power H-bridge that is designed to deliver 30 W/rms into loads of 4
Ω to 8 Ω. Rather than
requiring the usual heatsink, the package is designed to deliver this wattage by careful layout as described in
the application note SLAA117. Careful attention must be given to the value of the high-voltage power supply
level for a given load resistance. See recommended operating conditions.



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