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PCA84C441 датащи(PDF) 6 Page - NXP Semiconductors |
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PCA84C441 датащи(HTML) 6 Page - NXP Semiconductors |
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6 / 40 page ![]() Table 1 Pin description Note 1. 84CX40; 84CX43 denotes the types: PCA84C440, PCA84C443, PCA84C640, PCA84C643, PCA84C840 and PCA84C843. 84CX41; 84CX44 denotes the types: PCA84C441, PCA84C444, PCA84C641, PCA84C644, PCA84C841 and PCA84C844. SYMBOL(1) PIN(1) DESCRIPTION 84CX40; 84CX43 84CX41; 84CX44 84CX40; 84CX43 84CX41; 84CX44 Deviating pinning DP1.0 to DP1.4 DP1.0 to DP1.3 41, 38, 37, 36, 34 41, 38, 37, 36 Derivative Port 1: quasi-bidirectional I/O lines. T1 T1 29 34 Direct testable pin and event counter input. DOSC1 − 28 − Connection to RC oscillator of OSD clock. − DOSC1/DOSC2 − 28, 29 Connections to LC oscillator of OSD clock. Mutual pinning DP0.0/TDAC 1 Derivative Port 0: quasi-bidirectional I/O line or 14-bit DAC PWM. DP0.1 to DP0.5/PWM1 to PWM5 2 to 6 Derivative Port 1: quasi-bidirectional I/O lines or 6-bit DAC PWM. P1.0 to P1.4 7, 8, 10, 11 and 12 Port 1: quasi-bidirectional I/O lines. P0.0 to P0.7 13 to 20 Port 0: quasi-bidirectional I/O port. DP1.7/AFC 9 Derivative Port 1: quasi-bidirectional I/O line or comparator input with 3-bit DAC. DP0.6/SDA 40 Derivative open drain I/O port or I2C-bus data line. DP0.7/SCL 39 Derivative open drain I/O port or I2C- bus clock line. INT/T0 35 External interrupt or direct testable line. DP1.5 and DP1.6/VOW2 and VOW1 23, 22 Derivative Port 1: quasi-bidirectional I/O lines or character video output. RESET 33 Initialize input, active LOW. XTAL2, XTAL1 32, 31 Oscillator output or input terminal for system clock. TEST/EMU 30 Control input for testing and emulation mode. Ground for normal operation. VSYNCN 27 Vertical synchronous signal input. HSYNCN 26 Horizontal synchronous signal input. VOB 25 Blanking output. VOW3 24 Character video output of OSD. VSS 21 Ground. VDD 42 Power supply. |
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