2.1.6 Switched-Capacitor Voltage Doubler with the TS4102 and TS3004 Timer

In portable applications, it is a common requirement for a battery to continue to supply power to a circuit when it has discharged to a

voltage unusable by other devices in the system. To address this, a simple voltage doubler can be designed using two SPDT switches

in a single TS4102 device and a TS3004 timer as shown in the figure below.

In this configuration, the TS3003 timer FOUT output provides a 200 Hz (50% Duty Cycle) clock signal to address pin ADDA and ADDB

that switches between 0 V and VDD. When the clock signal to the address pins ADDA and ADDB is 0 V, capacitor C1 is charged to

VSUPPLY. When the clock input is VDD, the charge in C1 is passed to C2 and effectively doubles the voltage at NOB to 2 x VSUPPLY.

Unlike other analog switches, the TS4102 allows the supply voltage to be independent of the common mode input voltage. In this con-

figuration, the TS4102 allows the supply voltage to be independent of the common mode input voltage. In this configuration, the

TS4102 and the TS3004 can operate at a supply voltage range of 1.55 V to 5.25 V while the output voltage is 5 V with VSUPPLY = 2.5

V. With VDD = 1.55 V, the complete circuit consumes only 3 μA of supply current and can drive an output load of up to 48 μA (5% drop

at VOUT).

Figure 2.2. Switched-Capacitor Voltage Doubler with TS4102 and TS3004 Timer

TS4100/01/02 Data Sheet

System Overview

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