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DS1852 датащи(PDF) 2 Page - Dallas Semiconductor |
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DS1852 датащи(HTML) 2 Page - Dallas Semiconductor |
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2 / 25 page ![]() DS1852 2 of 25 PIN DESCRIPTIONS Name Ball Locations Description VCC D2, D4, E3 Power-Supply Terminal. The DS1852 will support supply voltages ranging from +2.7V to +5.5V. GND B3, C2, C4, D3 Ground Terminal SDA B5 2-Wire Serial Data. The serial data pin is for serial data transfer to and from the DS1852. The pin is open drain and may be wire-OR’ed with other open-drain or open-collector interfaces. SCL A5 2-Wire Serial Clock. The serial clock input is used to clock data into the DS1852 on rising edges and clock data out on falling edges. Bin A3 Analog Input Pin (Bias Value). Input to A/D. Pin D1 Analog Input Pin (Power Level). Input to A/D. Rin A2 Analog Input Pin (Received Power). Input to A/D. ASEL B2 Address Select Pin. If set to logic 0, the device address is A0h. If set to logic 1, the value in Table 3, byte D0h determines the chip address (factory default is A2h). For SFF-8472 compliance, this pin should be connected high. Din C5 Digital Input Pin (TX Disable). Digital input for mirroring in memory map. RSin B4 Digital Input Pin (Rate Select). Digital input for mirroring in memory map. Fin E5 Digital Input Pin (TX Fault). Digital input for mirroring in memory map. Lin A1 Digital Input Pin (LOS). Digital input for mirroring in memory map. NC A4, B1, C1, D5, No Connect E1, E2, E4, C3 |
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