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AS7221 датащи(PDF) 9 Page - ams AG |
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AS7221 датащи(HTML) 9 Page - ams AG |
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9 / 36 page ![]() ams Datasheet Page 9 [v1-01] 2016-Dec-08 Document Feedback AS7221 − Electrical Characteristics Figure 7: AS7221 I²C Master Timing Characteristics Figure 8: I²C Master Timing Diagram Symbol Parameter Conditions Min Typ Max Unit I²C Interface fSCLK SCL Clock Frequency 100 400 kHz tBUF Bus Free Time Between a STOP and START 1.3 μs tHD:STA Hold Time (Repeated) START 0.6 μs tLOW LOW Period of SCL Clock 1.3 μs tHIGH HIGH Period of SCL Clock 0.6 μs tSU:STA Setup Time for a Repeated START 0.6 μs tHD:DAT Data Hold Time 0 0.9 μs tSU:DAT Data Setup Time 100 ns tR Rise Time of Both SDA and SCL 20 300 ns tF Fall Time of Both SDA and SCL 20 300 ns tSU:STO Setup Time for STOP Condition 0.6 μs CB Capacitive Load for Each Bus Line CB — total capacitance of one bus line in pF 400 pF CI/O I/O Capacitance (SDA, SCL) 10 pF SCL SDA tSU:STA tLOW tHIGH tF tR tHD:STA tSU:STO tSU:DAT tHD:DAT tBUF VIH VIL PS SP Stop Start |
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