LM4651 datasheet(6/20 Pages) NSC

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LM4652 Pin Descriptions

Pin No.

Symbol

Description

GND

A ground reference for the thermal shut down circuitry.

2LG

Low−Gate #1 is the gate input to a bottom side MOSFET in the H-Bridge.

3−V

The negative voltage supply input for the power MOSFET H-Bridge.

TSD

The thermal shut down flag pin. This pin transitions to 6V when the die temperature

exceeds 150˚C.

No connection

6LG

Low−Gate #2 is the gate input to a bottom side MOSFET in the H-Bridge.

7VO

The switching output pin for one side of the H-Bridge.

No connection.

High−Gate #2 is the gate input to a top side MOSFET in the H-Bridge.

No connection.

The positive voltage supply input for the power MOSFET H-Bridge.

High−Gate #1 is the gate input to a top side MOSFET in the H-Bridge.

The switching output pin for one side of the H-Bridge.

Note: NC, no connect pins are floating pins. It is best to connect the pins to GND to minimize any noise from being coupled into

the pins.

External Components Description (Refer to Figure 1)

Components

Functional Description

Works with R

2,Rfl1 and Rfl2 to set the gain of the system. Gain = [(R2/R1) x ((Rfl1 +

fl2)/ Rfl2)−(R2/R1) + .5].

See description above for R

Sets the gain and bandwidth of the system by creating a low pass filter for the Error

Amplifier’s feedback with C

f. 3dB pole is at fC = 1/(2πRfCf) (Hz).

See description above for R

fI1

Provides a reduction in the feedback with R

fI2.RfI1should be 10 X RfI2 minimum to

reduce effects on the pole created by R

fI2 and CfI1. See also note for R1,R2 for effect on

System Gain.

fI2

fI2 and CfI1 creates a low pass filter with a pole at fC = 1/(2πRfI2CfI1) (Hz). See also

note for R

1,R2 for effect on System Gain.

fI1

See description above for R

fI2.

fI3

Establish the second pole for the low pass filter in the feedback path at f

C =

1/(2

πR

fI3CfI2) (Hz).

fI2

See description above for R

fI3.

10.

Combined with C

BYP creates a 2−pole, low pass output filter that has a −3dB pole at fC

= 1/[2

π(L

12CBYP)

⁄2

] (Hz).

11.

Filters high frequency noise from the amplifier’s output to ground. Recommended value

is 0.1µF to 1µF.

12.

byp

See description for L

13.

B1−CB4

Bypass capacitors for V

CC,VEE, analog and digital voltages (VDD, +6V, −6V). See

Supply Bypassing and High Frequency PCB Design in the Application Information

section for more information.

14.

Provides the bootstrap capacitance for the boot strap pin.

15.

DLY

Sets the dead time or break before make to T

DLY = (1.7x10

−12)(500+R

DLY) (seconds).

16.

START

Controls the startup time with T

START = (8.5x10

4)C

START (seconds).

17.

SCKT

Sets the output short circuit current with I

SCKT = (1x10

5)/ (10k

Ω\ R

SCKT) (A).

18.

OSC

Controls the switching frequency with f

SW = 1X10

9 / (4000 + R

OSC) (Hz).

19.

Schottky diode to protect the output MOSFETs from fly back voltages.

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