Application Information

AC Link Serial Interface Protocol

AC Link Output Frame

The audio output frame (output from AC ’97 Controller) con-

tains control and PCM data targeted for the LM4540 control

registers and stereo DAC. The Tag slot, slot 0, contains 16

bits that tell the AC Link interface circuitry on the LM4540 the

validity of the following data slots.

A new audio output frame is signaled with a low to high tran-

sition of SYNC. SYNC is synchronous to the rising edge of

BIT_CLK. On the next rising edge of BIT_CLK, the AC ’97

Controller drives SD_OUT with the first bit of slot 0. The

LM4540 samples SD_OUT on the falling edge of BIT_CLK.

The AC ’97 Controller will continue outputting the SD_OUT

stream on each successive rising edge of BIT_CLK.

SD_OUT Slot 0: Tag Phase

The first bit of slot 0 is designated the

″Valid Frame″ bit. If

this bit is 1, it indicates that the current data frame contains

at least one slot of valid data and the LM4540 will further

sampled the next four bits to determine which frames do in

fact have valid data. Valid slots are signified bya1in their re-

spective slot bit position.

Bit

Description

Comment

15

Valid Frame

1 = Valid Frame

14

Control

register

address

1 = Valid slot

13

Control

register data

1 = Valid slot

12

Left Playback

PCM Data

1 = Valid slot

DS100906-4

FIGURE 3. AC 97 Bidirectional Audio Frame

DS100906-6

FIGURE 4. AC Link Audio Output Frame

DS100906-5

FIGURE 5. Start of Audio Output Frame

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