HY29F080 datasheet(17/38 Pages) HYNIX

17 / 38 page

Rev. 6.1/May 01

HY29F080

or erase-suspended (see below). After an Erase

command sequence is written, if all sectors se-

lected for erasing are protected, DQ[6] toggles for

approximately 100 µs, then returns to reading ar-

ray data. If at least one selected sector is not

protected, the Automatic Erase algorithm erases

the unprotected sectors, and ignores the selected

sectors that are protected.

DQ[2] - Toggle Bit II

Toggle Bit II, DQ[2], when used with DQ[6], indi-

cates whether a particular sector is actively eras-

ing or whether that sector is erase-suspended.

Toggle Bit II is valid after the rising edge of the

final WE# pulse in the command sequence. The

device toggles DQ[2] with each OE# or CE# read

cycle.

DQ[2] toggles when the host reads at addresses

within sectors that have been selected for erasure,

but cannot distinguish whether the sector is ac-

tively erasing or is erase-suspended. DQ[6], by

comparison, indicates whether the device is ac-

tively erasing or is in Erase Suspend, but cannot

distinguish which sectors are selected for erasure.

Read DQ[7:0]

at Valid Address (Note 1)

DQ[6] Toggled?

(Note 3)

YES

PROGRAM/ERASE

COMPLETE

DQ[5] = 1?

YES

Read DQ[7:0]

at Valid Address (Note 1)

DQ[6] Toggled?

(Note 2)

YES

PROGRAM/ERASE

EXCEEDED TIME ERROR

Notes:

1. During programming, the program address.

During sector erase, an address within any sector scheduled for erasure.

2. Recheck DQ[6] since toggling may stop at the same time as DQ[5] changes from 0 to 1.

3. Use this path if testing for Program/Erase status.

4. Use this path to test whether sector is in Erase Suspend mode.

Read DQ[7:0]

at Valid Address (Note 1)

START

Read DQ[7:0]

DQ[2] Toggled?

SECTOR BEING READ

IS IN ERASE SUSPEND

Read DQ[7:0]

YES

(Note 4)

SECTOR BEING READ

IS NOT IN ERASE SUSPEND

Figure 8. Toggle Bit I and II Test Algorithm

Thus, both status bits are required for sector and

mode information.

Figure 8 illustrates the operation of Toggle Bits I

and II.

DQ[5] - Exceeded Timing Limits

DQ[5] is set to a ‘1’ when the program or erase

time has exceeded a specified internal pulse count

limit. This is a failure condition that indicates that

the program or erase cycle was not successfully

completed. DQ[5] status is valid only while DQ[7]

or DQ[6] indicate that an Automatic Algorithm is

in progress.

The DQ[5] failure condition will also be signaled if

the host tries to program a ‘1’ to a location that is

previously programmed to ‘0’, since only an erase

operation can change a ‘0’ to a ‘1’.

For both of these conditions, the host must issue

a Read/Reset command to return the device to

the Read mode.

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