BL24C02A/04A/08A/16A

BL24C02A/04A/08A/16A Belling Proprietary Information. Unauthorized Photocopy and Duplication Prohibited

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WRITE PROTECT (WP):

The BL24C02A/BL24C04A/BL24C08A/BL24C16A has a Write Protect pin that

provides hardware data protection. The Write Protect pin allows normal read/write operations when

connected to ground (GND). When the Write Protection pin is connected to Vcc, the write protection

feature is enabled and operates as shown in the following Table 2.

WP Pin Status

BL24C02A/04A/08A/16A

At VCC

Full Array

At GND

Normal Read/Write Operations

Functional Description

1. Memory Organization

BL24C02A, 2K SERIAL EEPROM:

Internally organized with 16 pages of 16 bytes each, the 2K requires an 8-

bit data word address for random word addressing.

BL24C04A, 4K SERIAL EEPROM:

Internally organized with 32 pages of 16 bytes each, the 4K requires a 9-

bit data word address for random word addressing.

BL24C08A, 8K SERIAL EEPROM:

Internally organized with 64 pages of 16 bytes each, the 8K requires a 10-

bit data word address for random word addressing.

BL24C16A, 16K SERIAL EEPROM:

Internally organized with 128 pages of 16 bytes each, the 16K requires an

11-bit data word address for random word addressing.

2. Device Operation

CLOCK and DATA TRANSITIONS:

The SDA pin is normally pulled high with an external device. Data on the

SDA pin may change only during SCL low time periods (see Figure 2). Data changes during SCL high

periods will indicate a start or stop condition as defined below.

START CONDITION:

A high-to-low transition of SDA with SCL high is a start condition which must

precede any other command (see Figure 3).

STOP CONDITION:

A low-to-high transition of SDA with SCL high is a stop condition. After a read

sequence, the stop command will place the EEPROM in a standby power mode (see Figure 3).

ACKNOWLEDGE:

All addresses and data words are serially transmitted to and from the EEPROM in 8-bit

words. The EEPROM sends a "0" to acknowledge that it has received each word. This happens during

the ninth clock cycle.

STANDBY MODE:

The BL24C02A/BL24C04A/BL24C08A/BL24C16A features a low-power standby mode

which is enabled: (a) upon power-up and (b) after the receipt of the STOP bit and the completion of any

internal operations.

MEMORY RESET:

After an interruption in protocol, power loss or system reset, any two-wire part can be

reset by following these steps:

Table 2