LAN9250 datasheet(140/421 Pages) MICROCHIP

140 / 421 page

LAN9250

DS00001913A-page 140

 2015 Microchip Technology Inc.

0 to 65,535 slot times. The Host MAC logic, upon receiving a frame with the reserved multicast address and PAUSE

opcode, inhibits data frame transmissions for the length of time indicated. If a Pause request is received while a trans-

mission is in progress, then the pause will take effect after the transmission is complete. Control frames are received,

processed by the Host MAC, and passed on.

The device will automatically transmit pause frames based on the settings of the Host MAC Automatic Flow Control Con-

figuration Register (AFC_CFG) and the Host MAC Flow Control Register (HMAC_FLOW). When the RX FIFO reaches

the level set in the Automatic Flow Control High Level (AFC_HI) field of Host MAC Automatic Flow Control Configuration

Time (FCPT) field of the Host MAC Flow Control Register (HMAC_FLOW) register. When the RX FIFO drops below the

level set in the Automatic Flow Control Low Level (AFC_LO) field of Host MAC Automatic Flow Control Configuration

only send another pause frame when the RX FIFO level falls below Automatic Flow Control Low Level (AFC_LO) and

then exceeds Automatic Flow Control High Level (AFC_HI) again.

11.2.2

HALF-DUPLEX FLOW CONTROL (BACKPRESSURE)

In half-duplex mode, backpressure is used for flow control. When the RX FIFO reaches the level set in the Automatic

Flow Control High Level (AFC_HI) field of Host MAC Automatic Flow Control Configuration Register (AFC_CFG), the

Host MAC will be enabled to collide with incoming frames. The Host MAC transmit logic enters a state at the end of

current transmission (if any), where it waits for the beginning of a receive frame. Based on the settings in Host MAC

Automatic Flow Control Configuration Register (AFC_CFG), backpressure can be enabled on any frame, a broadcast

frame, any multicast frame or frames that match the stations address decoding logic.

In order to avoid any late collisions the Host MAC only generates collision-based backpressure at the start of a new

frame. Once a new receive frame starts, the Host MAC intentional transmits which will result in a collision. Upon sensing

the collision, the remote station will back off its transmission. Following the transmission of the intentional collision, the

Host MAC waits for the next receive frame.

This pattern continues until either the RX FIFO drops below the level set in the Automatic Flow Control High Level

(AFC_HI) or until the duration specified by Backpressure Duration (BACK_DUR) in field of Host MAC Automatic Flow

Control Configuration Register (AFC_CFG) is reached. In either case, the Host MAC will allow one frame to be received

before returning to backpressure operation. Note that the Backpressure Duration is timed from when the RX FIFO

reaches the level set in Automatic Flow Control High Level (AFC_HI), regardless when or if actual backpressure occurs.

11.3

Virtual Local Area Network (VLAN) Support

Virtual Local Area Networks (VLANs), as defined within the IEEE 802.3 standard, provide network administrators a

means of grouping nodes within a larger network into broadcast domains. To implement a VLAN, four extra bytes are

added to the basic Ethernet packet. As shown in Figure 11-1, the four bytes are inserted after the Source Address Field

and before the Type/Length field. The first two bytes of the VLAN tag identify the tag, and by convention are set to the

value 0x8100. The last two bytes identify the specific VLAN associated with the packet and provide a priority field.

The device supports VLAN-tagged packets and provides two Host MAC registers, Host MAC VLAN1 Tag Register

(HMAC_VLAN1) and Host MAC VLAN2 Tag Register (HMAC_VLAN2), which are used to identify VLAN-tagged pack-

ets. The HMAC_VLAN1 register is used to specify the VLAN1 tag which will increase the legal frame length from 1518

to 1522 bytes. The HMAC_VLAN2 register is used to specify the VLAN2 tag which will increase the legal frame length

from 1518 to 1538 bytes. If a packet arrives bearing either of these tags in the two bytes succeeding the Source Address

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