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HV9989 датащи(PDF) 9 Page - Microchip Technology

номер детали HV9989
подробное описание детали  Three-Channel CCM/DCM Boost LED Driver with Sub-Microsecond PWM Dimming
PDF  22 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

HV9989 датащи(HTML) 9 Page - Microchip Technology

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 2014 Microchip Technology Inc.
DS20005296B-page 9
HV9989
3.0
FUNCTIONAL DESCRIPTION
3.1
Power Topology
HV9989 is a three-channel, switch-mode converter,
LED driver designed to control a continuous conduction
mode boost or SEPIC device in a constant frequency
mode. The IC includes an internal linear regulator,
which operates from 10 to 40V input voltages. This
device can also be powered directly using the VDD
pins and bypassing the internal linear regulator.
HV9989 includes features typically required in LED
drivers such as open LED protection, output short cir-
cuit protection, linear and PWM dimming, programma-
ble input current limiting and accurate control of the
LED current. A high current gate drive output enables
the controller to be used in high power converters.
HV9989 is ideally suited for back-light applications
using either RGB or multi-channel white LED
configurations.
3.2
Power Supply to the IC (VIN, VDD,
VDD1-3)
The HV9989 can be powered directly from its VIN pin
that takes a voltage up to 40V. When a voltage is
applied at the VIN pin, the HV9989 tries to maintain a
constant 7.75V (typ) at the VDD pin. The regulator also
has a built in under-voltage lockout which shuts off the
IC if the voltage at the VDD pin falls below the UVLO
threshold. By connecting this VDD pin to the individual
VDD pins of the three channels, the internal regulator
can be used to power all three channels in the IC.
In case the internal regulator is not utilized, an external
power supply (7-9V) can be used to power the IC. In
this case, the power supply is directly connected to the
VDD pins and the VIN pin is left unconnected.
All four VDD pins must be bypassed by a low ESR
capacitor (≥0.1 µF) to provide a low impedance path for
the high frequency current of the output gate driver.
These capacitors must be referenced to the individual
grounds for proper noise rejection. Also, in all cases,
the four VDD pins must be connected together
externally.
The input current drawn from the external power supply
(or VIN pin) is a sum of the 4 mA current drawn by the
all the internal circuitry (for all three channels) and the
current drawn by the gate drivers (which in turn
depends on the switching frequency and the gate
charge of the external FET).
In the preceding equation, fS is the switching frequency
of the converters and QG1-3 are the gate charges of the
external FETs (which can be obtained from the FET
data sheets).
The EN pin is a TTL-compatible input used to disable
the IC. Pulling the EN pin to GND will shut down the IC
and reduce the quiescent current drawn by the IC to be
lower than 500 μA. If the enable function is not
required, the EN pin can be connected to VDD.
3.3
Clock Input (CLK)
The switching frequency of the converters are set by
using a TTL-compatible square wave input at the CLK
pin. The switching frequencies of the three converters
will be 1/12th the frequency of the external clock.
3.4
Current Sense (CS1-3)
The current sense input is used to sense the source
current of the switching FET. The CS input of the
HV9989 includes a built-in 100 ns (minimum) blanking
time to prevent spurious turn off due to the initial current
spike when the FET turns on.
The IC includes an internal resistor divider network,
which steps down the voltage at the COMP pins by a
factor of 12 (including the internal diode drop). This
stepped-down voltage is given to one of the
comparators as the current reference.
It is recommended that the sense resistor RCS be cho-
sen so as to provide about 250 mV current sense signal.
3.5
Slope Compensation
For continuous conduction mode converters operating in
the Constant Frequency mode, slope compensation
becomes necessary to ensure stability of the peak cur-
rent mode controller, if the operating duty cycle is greater
than 0.5. Choosing a slope compensation which is one
half of the down slope of the inductor current ensures
that the converter will be stable for all duty cycles.
Slope compensation in the HV9989 can be pro-
grammed by a single resistor at SC input common for
all three channels. Assuming a down slope of DS (A/
ms) for the inductor current, the SC resistor can be
computed as:
where RCS is the current sense resistor at the CSX
inputs.
IIN 4mA Q
G1
QG2 QG3
++
+fs
=
RSC
2VDD
V
SC
DS 10
6
RCSCSC EFF

--------------------------------------------------------------
11
V
DS RCSCSC EFF

-----------------------------------------------
=



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