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AT89LS52 датащи(PDF) 18 Page - ATMEL Corporation |
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AT89LS52 датащи(HTML) 18 Page - ATMEL Corporation |
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18 / 39 page ![]() 18 AT89LS52 2601A–12/01 Figure 6. Interrupt Sources Table 7. Interrupt Enable (IE) Register (MSB) (LSB) EA – ET2 ES ET1 EX1 ET0 EX0 Enable Bit = 1 enables the interrupt. Enable Bit = 0 disables the interrupt. Symbol Position Function EA IE.7 Disables all interrupts. If EA = 0, no interrupt is acknowledged. If EA = 1, each interrupt source is individually enabled or disabled by setting or clearing its enable bit. – IE.6 Reserved. ET2 IE.5 Timer 2 interrupt enable bit. ES IE.4 Serial Port interrupt enable bit. ET1 IE.3 Timer 1 interrupt enable bit. EX1 IE.2 External interrupt 1 enable bit. ET0 IE.1 Timer 0 interrupt enable bit. EX0 IE.0 External interrupt 0 enable bit. User software should never write 1s to reserved bits, because they may be used in future AT89 products. IE1 IE0 1 1 0 0 TF1 TF0 INT1 INT0 TI RI TF2 EXF2 |
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