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TUSB422 датащи(PDF) 7 Page - Texas Instruments |
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TUSB422 датащи(HTML) 7 Page - Texas Instruments |
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7 / 71 page ![]() 7 TUSB422 www.ti.com SLLSEW6 – NOVEMBER 2016 Product Folder Links: TUSB422 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Electrical Characteristics (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VCONN RDS(ON) ON resistance of the VCONN power FET. 0.4 0.75 Ω V(PASS) Voltage to pass through VCONN power FET 5 V I(VCONN) VCONN current limit; VCONN is disconnected above this voltage. 500 650 850 mA V(VCONN_PRES) Threshold for detecting Vconn present. 2 2.4 V C(VCONN) Bulk capacitance on VCONN; Placed on VCONN pin supply 10 200 µF R(VCONN_DIS) Resistance to GND when Vconn discharge is enabled 4.6 5.1 5.6 KΩ VBUSIN C(BULK_SRC) Source External bulk capacitance when operating as VBUS Source. 10 150 µF C(SNK) Sink External bulk capacitance on VBUS at connector 1 10 µF C(SNKPD) Sink External bulk capacitance on VBUS after success PD negotiation 1 100 µF R(BLEED) Resistance to gnd when bleed discharge is enabled 8 10 12.5 KΩ V(SRCSLEWNEG) VBUS discharge maximum slew rate –30 mV/µs V(VBUS_MEASURE_ACC) VBUS_VOLTAGE register measurement accuracy –2% 2% OTSD T(OTSD1) TJ over temperature trip threshold resulting in VCONN turn off and flag set. 150 °C 6.6 Timing Requirements MIN NOM MAX UNIT CC pins in PD mode Fbr_PD Bit Rate 270 300 330 Kbps tUI_PD Unit Interval 3.03 3.3 3.7 µs tRISE_PD Rise time 10% to 90%; CRX(SHUNT) = 200 pF 300 ns tFALL_PD Fall time 90% to 10%; CRX(SHUNT) = 200 pF 300 ns tRxFilter Rx Bandwidth limiting filter 100 ns tInterFrameCap Time from the end of last bit of a frame until the state of the first bit of the next pre-amble 25 50 µs tStartDrive Time before the start of the first bit of the preamble when the transmitter shall start driving the line. -1 1 µs tEndDriveBMC Time to cease driving the line after the end of the last bit of a frame 23 µs tHoldLowBMC Time to cease driving the line after the final high-to-low transition 1 23 µs nTransitionCount Transitions for signal detect Number of transitions to be detected to declare bus non-idle 3 tFRSWAPTX Fast Role Swap request transmit duration 60 120 µs tFRSWAPRX Fast Role Swap detection time 30 50 µs I2C (SDA and SCL) FSCL SCL clock frequency 0.001 1 MHz tHD;STA Hold time (repeated) start condition 0.26 µs tLOW Low period of SCL 0.5 µs |
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