LAN91C100FD_08 datasheet(4/77 Pages) SMSC

4 / 77 page

FEAST Fast Ethernet Controller with Full Duplex Capability

Revision 1.0 (09-22-08)

Page 4

SMSC LAN91C100FD Rev. D

DATASHEET

Figure 7.1 - LAN91C100FD on VL BUS.......................................................................................................................57

Figure 7.2 - LAN91C100FD on ISA Bus.......................................................................................................................59

Figure 7.3 - LAN91C100FD on EISA Bus ....................................................................................................................62

Figure 9.1 - Asynchronous Cycle - nADS=0.................................................................................................................66

Figure 9.2 - Asynchronous Cycle - Using nADS...........................................................................................................67

Figure 9.3 - Asynchronous Cycle - nADS=0.................................................................................................................68

Figure 9.4 - Burst Write Cycles - nVLBUS=1 ...............................................................................................................69

Figure 9.5 - Burst Read Cycles - nVLBUS=1 ...............................................................................................................70

Figure 9.6 - Address Latching for all Modes.................................................................................................................71

Figure 9.7 - Synchronous Write Cycles - nVLBUS=0 ...................................................................................................71

Figure 9.8 - Synchronous Read Cycle - NVLBUS=0 ....................................................................................................72

Figure 9.9 - SRAM Interface ........................................................................................................................................73

Figure 9.10 - ENDEC Interface - 10 Mbps ...................................................................................................................74

Figure 9.11 - MII Interface............................................................................................................................................75

Figure 10.1 - 208 Pin QFP Package Outline ................................................................................................................76

Figure 10.2 - 208 Pin TQFP Package Outlines ............................................................................................................77

List of Tables

Table 3.1 - LAN91C100FD Pin Requirements

Table 5.1 - Internal I/O Space Mapping

Table 7.1 - VL Local Bus Signal Connections

Table 7.2 - High-End ISA or Non-Burst EISA Machines Signal Connectors

Table 7.3 - EISA 32 Bit Slave Signal Connections

Table 10.1 - 208 Pin QFP Package Parameters

Table 10.2 - 208 Pin TQFP Package Outlines

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