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SST25PF040B датащи(PDF) 13 Page - Microchip Technology

номер детали SST25PF040B
подробное описание детали  4 Mbit 2.3-3.6V SPI Serial Flash
PDF  31 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

SST25PF040B датащи(HTML) 13 Page - Microchip Technology

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 2014 Microchip Technology Inc.
DS20005134B-page 13
SST25PF040B
FIGURE 4-12:
64-KBYTE BLOCK-ERASE SEQUENCE
4.4.9
CHIP-ERASE
The Chip-Erase instruction clears all bits in the device
to FFH. A Chip-Erase instruction will be ignored if any
of the memory area is protected. Prior to any Write oper-
ation, the Write-Enable (WREN) instruction must be exe-
cuted. CE# must remain active low for the duration of
the Chip-Erase instruction sequence. The Chip-Erase
instruction is initiated by executing an 8-bit command,
60H or C7H. CE# must be driven high before the instruction
is executed. The user may poll the Busy bit in the software
status register or wait TCE for the completion of the
internal self-timed Chip-Erase cycle. See Figure 4-13
for the Chip-Erase sequence.
FIGURE 4-13:
CHIP-ERASE SEQUENCE
CE#
SO
SI
SCK
ADDR
01 2 3 4 5 6 7 8
ADDR
ADDR
D8
HIGH IMPEDANCE
15 16
23 24
31
MODE 0
MODE 3
25134 63KBlkEr.0
MSB
MSB
CE#
SO
SI
SCK
01 2 3 4 5 6 7
60 or C7
HIGH IMPEDANCE
MODE 0
MODE 3
25134 ChEr.0
MSB



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