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IRU3033CS датащи(PDF) 3 Page - International Rectifier |
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IRU3033CS датащи(HTML) 3 Page - International Rectifier |
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3 / 12 page ![]() IRU3033 3 Rev. 1.7 07/17/02 www.irf.com PIN DESCRIPTIONS BLOCK DIAGRAM Figure 2 - Simplified block diagram of the IRU3033. The PWM output of the switching controller. This pin is a totem pole drive that is con- nected to the gate of the power MOSFET. A resistor may be placed from this pin to the gate in order to reduce switching noise. This pin supplies the voltage to the PWM drive and hysteresis circuitry and it is connected to the 12V supply. A 1 mF, high frequency capacitor must be connected from this pin to ground to provide the peak current for charging and discharging of the MOSFET. A resistor divider from this pin to the output of the switching regulator and ground sets the Core supply voltage. A resistor and a 10pF capacitor is connected from this pin to the VFB1 pin to set the output ripple voltage for the switching regulator. This pin is connected to the IC substrate and must be connected to the lowest potential in the system. The feedback pin of the linear regulator. A resistor divider from this pin to the output of the linear regulator and ground sets the I/O supply voltage. The drive pin of the linear regulator. This pin controls the base of a transistor or the gate of a MOSFET acting as the series pass element for the linear regulator. This pin provides the biasing for the chip and drive for the linear regulator controller. It is connected to 12V supply. A 10 V resistor in series from this pin to the 12V supply and a 1 mF, high frequency capacitor connected from this pin to ground is required to filter the switching noise of the switching regulator. PIN # PIN SYMBOL PIN DESCRIPTION 1 2 3 4 5 6 7 8 Drv1 V12(SW) VFB1 VHYST Gnd VFB2 Drv2 V12 VREF UVLO 1.25V PWM Control V12(SW) VHYST VFB2 Drv 1 Gnd VFB1 Drv2 5 1 2 4 3 6 7 V12 8 5V Reg |
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