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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STM32L475VG датащи(PDF) 149 Page - STMicroelectronics |
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STM32L475VG датащи(HTML) 149 Page - STMicroelectronics |
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149 / 193 page  DocID027692 Rev 2 149/193 STM32L475xx Electrical characteristics 181 Figure 24. 12-bit buffered / non-buffered DAC 1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the DAC_CR register. . 3. Refer to Table 59: I/O static characteristics. 4. Ton is the Refresh phase duration. Toff is the Hold phase duration. Refer to RM0395 reference manual for more details. Table 71. DAC accuracy(1) Symbol Parameter Conditions Min Typ Max Unit DNL Differential non linearity (2) DAC output buffer ON - - ±2 LSB DAC output buffer OFF - - ±2 - monotonicity 10 bits guaranteed INL Integral non linearity(3) DAC output buffer ON CL ≤ 50 pF, RL ≥ 5 kΩ -- ±4 DAC output buffer OFF CL ≤ 50 pF, no RL -- ±4 Offset Offset error at code 0x800(3) DAC output buffer ON CL ≤ 50 pF, RL ≥ 5 kΩ VREF+ = 3.6 V - - ±12 VREF+ = 1.8 V - - ±25 DAC output buffer OFF CL ≤ 50 pF, no RL -- ±8 Offset1 Offset error at code 0x001(4) DAC output buffer OFF CL ≤ 50 pF, no RL -- ±5 OffsetCal Offset Error at code 0x800 after calibration DAC output buffer ON CL ≤ 50 pF, RL ≥ 5 kΩ VREF+ = 3.6 V - - ±5 VREF+ = 1.8 V - - ±7 |
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