поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

STM32F745VG датащи(PDF) 157 Page - STMicroelectronics

номер детали STM32F745VG
подробное описание детали  ARM-based Cortex-M7 32b MCUFPU, 462DMIPS, up to 1MB Flash/32016 4KB RAM, USB OTG HS/FS, ethernet, 18 TIMs, 3 ADCs, 25 com itf, cam & LCD
PDF  227 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F745VG датащи(HTML) 157 Page - STMicroelectronics

Back Button STM32F745VG Datasheet HTML 153Page - STMicroelectronics STM32F745VG Datasheet HTML 154Page - STMicroelectronics STM32F745VG Datasheet HTML 155Page - STMicroelectronics STM32F745VG Datasheet HTML 156Page - STMicroelectronics STM32F745VG Datasheet HTML 157Page - STMicroelectronics STM32F745VG Datasheet HTML 158Page - STMicroelectronics STM32F745VG Datasheet HTML 159Page - STMicroelectronics STM32F745VG Datasheet HTML 160Page - STMicroelectronics STM32F745VG Datasheet HTML 161Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 157 / 227 page
background image
DocID027590 Rev 4
157/227
STM32F745xx STM32F746xx
Electrical characteristics
195
Figure 46. SPI timing diagram - slave mode and CPHA = 0
tsu(MI)
Data input setup time
Master mode
5.5
-
-
ns
tsu(SI)
Slave mode
4
-
-
th(MI)
Data input hold time
Master mode
4
-
-
th(SI)
Slave mode
2
-
-
ta(SO)
Data output access time
Slave mode
7
-
21
tdis(SO)
Data output disable time
Slave mode
5
-
12
tv(SO)
Data output valid time
Slave mode 2.7≤VDD≤3.6V
-
6.5
10
Slave mode 1.71≤VDD≤3.6V
-
6.5
13
tv(MO)
Master mode
-
2
4
th(SO)
Data output hold time
Slave mode
1.71≤VDD≤3.6V
5.5
-
-
th(MO)
Master mode
0
-
-
1. Guaranteed by characterization results.
2. Excepting SPI1 with SCK IO pin mapped on PA5. In this configuration, Maximum achievable frequency is 40MHz.
3. Maximum Frequency of Slave Transmitter is determined by sum of Tv(SO) and Tsu(MI) intervals which has to fit into SCK
level phase preceding the SCK sampling edge.This value can be achieved when it communicates with a Master having
Tsu(MI)=0 while signal Duty(SCK)=50%.
Table 76. SPI dynamic characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com